CircuitNet 2.0: An Advanced Dataset for Promoting Machine Learning Innovations in Realistic Chip Design Environment

X Jiang, Y Zhao, Y Lin, R Wang… - The Twelfth International …, 2024 - openreview.net
Integrated circuits or chips are key to enable computing in modern industry. Designing a
chip relies on human experts to produce chip data through professional electronic design …

[PDF][PDF] An Open-source End-to-End Logic Optimization Framework for Large-scale Boolean Network with Reinforcement Learning

Z Li, K Zhu, X Zhou, L Wang - arXiv preprint arXiv:2403.17395, 2024 - arxiv.org
An Open-source End-to-End Logic Optimization Framework for Large-scale Boolean
Network with Reinforcement Learning Page 1 1 An Open-source End-to-End Logic …

Register Aggregation for Hardware Decompilation

V Rao, ZD Sisco - arXiv preprint arXiv:2409.03119, 2024 - arxiv.org
Hardware decompilation reverses logic synthesis, converting a gate-level digital electronic
design, or netlist, back up to hardware description language (HDL) code. Existing …