Exploring Ternary Computing: Design of a Superscalar CPU and Carry-Lookahead Adder
OC Moholth - 2024 - openarchive.usn.no
This thesis explores the design and architecture of a balanced ternary RISC-V-like Energy
efficient Balanced tErnary Logic (REBEL)-2 Central Processing Unit (CPU). There is a …
efficient Balanced tErnary Logic (REBEL)-2 Central Processing Unit (CPU). There is a …
Beyond CMOS: Ternary and mixed radix CNTFET circuit design, simulation and verification
S Bos, HN Risto, H Gundersen - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
For three-valued or ternary computing to be an alternative for binary, new multiple valued
logic (MVL) electronic design automation (EDA) tools are needed. In this article we present a …
logic (MVL) electronic design automation (EDA) tools are needed. In this article we present a …