Dataflow all-reduce for reconfigurable processor systems

MR Raumann, Q Zheng, BB Shah, R Kumar… - US Patent …, 2022 - Google Patents
2021-09-08 Assigned to SambaNova Systems, Inc. reassignment SambaNova Systems, Inc.
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Dataflow function offload to reconfigurable processors

MR Raumann, Q Zheng, BB Shah, R Kumar… - US Patent …, 2022 - Google Patents
Roughly described, the invention involves a system including a plurality of functional units
that execute different segments of a dataflow, and share intermediate results via a peer-to …

Software defined networking operations for programmable connected devices

A Gupta, AS Narsian, HK Lee, SS Dhoble… - US Patent …, 2021 - Google Patents
A virtual network comprising virtual machines executing at a computing environment is
implemented. A software defined networking (SDN) appliance is configured to provide a …

Intra-node buffer-based streaming for reconfigurable processor-as-a-service (RPaaS)

R Sivaramakrishnan, S Jairath, EA Burhan… - US Patent …, 2021 - Google Patents
A data processing system comprises a plurality of reconfigurable processors including a first
reconfigurable processor and additional reconfigurable processors, a plurality of buffers in a …

Resource allocation for reconfigurable processors

R Shenbagam, R Kumar - US Patent 11,200,096, 2021 - Google Patents
(Continued) Primary Examiner Lewis A Bullock, Jr. Assistant Examiner Melissa A Headly
(74) Attorney, Agent, or Firm—Haynes Beffel & Wolfeld LLP; Sikander M. Khan (57) …

Training a neural network using a non-homogenous set of reconfigurable processors

MR Raumann, Q Zheng, BB Shah, R Kumar… - US Patent …, 2024 - Google Patents
A system for training parameters of a neural network includes a processing node with a
processor reconfigurable at a first level of configuration granularity and a controller …

Time-multiplexed use of reconfigurable hardware

A Misra, G Arnav, Q Zheng, R Shenbagam… - US Patent …, 2023 - Google Patents
A method for executing applications in a system comprising general hardware and
reconfigurable hardware includes accessing a first execution file comprising metadata …

Inter-node execution of configuration files on reconfigurable processors using smart network interface controller (smartnic) buffers

R Sivaramakrishnan, S Jairath, EA Burhan… - US Patent …, 2023 - Google Patents
The technology disclosed relates to inter-node execution of configuration files on
reconfigurable processors using smart network interface controller (SmartNIC) buffers. In …

Inter-processor execution of configuration files on reconfigurable processors using smart network interface controller (SmartNIC) buffers

R Sivaramakrishnan, S Jairath, EA Burhan… - US Patent …, 2023 - Google Patents
The technology disclosed relates to inter-processor execution of configuration files on
reconfigurable processors using smart network interface controller (SmartNIC) buffers. In …

Runtime execution of configuration files on reconfigurable processors with varying configuration granularity

R Sivaramakrishnan, S Jairath, EA Burhan… - US Patent …, 2023 - Google Patents
The technology disclosed relates to runtime execution of configuration files on
reconfigurable processors with varying configuration granularity. In particular, the …