(57) ABSTRACT A method for making an interposer includes forming a plurality of wire
bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is …

See application? le for Complete Seam}; hist'ory providing a microelectronic package
having a substrate, a' microelectronic element overlying the substrate and at least (56) …

A structure may include bond elements having bases joined to (51) Int. Cl. conductive
elements at a first portion of a first Surface and end HOIL 23/02(2006.01) surfaces remote …

(2013.01); HOIL 23/3121 (2013.01); HOIL A semiconductor device includes a ball grid array
(BGA) 23/3128 (2013.01); H0IL 23/562 (2013.01); package including first bumps. A first …

US PATENT DOCUMENTS 3,358,897 A 12/1967 Christensen 3,623,649 A 1 1/1971
Keisling 3,795,037 A 3, 1974 Luttmer 3,900,153 A 8, 1975 Beerwerth et al. 4,327,860 A 5 …

(21) Appl. No.: 12/769,930 OTHER PUBLICATIONS JP Pub. 2004-327856 “Method for
manufacturing wiring circuit (22) Filed: Apr. 29, 2010 board and method for manufacturing …

(57) ABSTRACT A method of making a microelectronic package includes forming a
dielectric encapsulation layer on an in-process unit having a substrate having a first Surface …

6,439,450 B1* 8/2002 Chapman et al........... 228,180.5 2004/0124518 Al 7/2004 Karnezos
6,458,411 B1 10/2002 Goossen et al. 2004/0160751 A1 8/2004 Inagaki et al. 6,495,914 B1 …

US PATENT DOCUMENTS ductor chip, has a dielectric mass overlying the package Sub
strate and microelectronic element and has top terminals exposed at the top surface of the …

(57) ABSTRACT A plurality of microelectronic assemblies (60) are made by severing an in-
process unit including an upper Substrate (40) and lower substrate (20) with microelectronic …