US10515030B2 - Method and device for improved advanced microcontroller bus architecture
(AMBA) and advanced extensible interface (AXI) operations - Google Patents US10515030B2 …

A memory system comprises memory devices coupled to a memory controller via a memory
interface bus, the memory controller for receiving one or more memory requests via an …

Described apparatuses and methods track access metadata pertaining to activity within
respective address ranges. The access metadata can be used to inform prefetch operations …

A control circuit for controlling memory prefetch requests to system level cache (SLC). The
control circuit includes a circuit identifying memory access requests received at the system …

(57) ABSTRACT A memory system comprises a memory device coupled to a memory
controller, the memory controller for receiving one or more memory requests from one or …

A memory system includes a memory device of lower read operation speed; a memory
cache of higher read operation speed; and a controller suitable for: setting one of access …

A memory system comprises a memory device coupled to a memory controller, the memory
controller for receiving one or more memory requests from one or more core devices via an …

Described apparatuses and methods form adaptive cache lines having a configurable
capacity from hardware cache lines having a fixed capacity. The adaptive cache lines can …

Described apparatuses and methods track access metadata pertaining to activity within
respective address ranges. The access metadata can be used to inform prefetch operations …

A computer system, processor, and method for processing information is disclosed that
includes allocating a prefetch stream; providing a protection bubble to a plurality of …