Challenges and Opportunities to Enable Large-Scale Computing via Heterogeneous Chiplets
Fast-evolving artificial intelligence (AI) algorithms such as large language models have
been driving the ever-increasing computing demands in today's data centers …
been driving the ever-increasing computing demands in today's data centers …
On hardware security and trust for chiplet-based 2.5 D and 3D ICs: Challenges and Innovations
The relentless pace of transistor miniaturization has enabled developers to continuously
increase chip complexity since the beginning of the information age. However, as transistors …
increase chip complexity since the beginning of the information age. However, as transistors …
A 25‐Gb/s/pin ground‐referenced signaling transceiver with a DC‐coupled equalizer for on‐package communication
C Guo, Y Chen, H Wang, X Chen… - International Journal of …, 2024 - Wiley Online Library
This paper proposes a wireline serial link transceiver for on‐package die‐to‐die links based
on 12‐nm fin field‐effect transistor (FinFET) technology. The link is crucial for improving the …
on 12‐nm fin field‐effect transistor (FinFET) technology. The link is crucial for improving the …
A Novel Method for Mapping Parallel Vector-Scalar Multiplication on CGRA
P Jin, D Wang, N Li, M Zhang, Z Li… - 2023 IEEE 6th …, 2023 - ieeexplore.ieee.org
In this study, a novel method for mapping parallel vector-scalar multiplication on a specific
Coarse Gained Reconfigurable Arrays (CGRA) is proposed for a research of the scalable …
Coarse Gained Reconfigurable Arrays (CGRA) is proposed for a research of the scalable …
[PDF][PDF] Design and technology spaces for heterogeneous chiplet integration
Y Shim, WS Kwon, A Qao - 2022 - designthesolution.org
Heterogeneous chiplet integration is an emerging technology to boost up computing power
and build cost effective systems for HPC, AI and ML ASICs. In this paper, we introduce efforts …
and build cost effective systems for HPC, AI and ML ASICs. In this paper, we introduce efforts …