In this article, a double-gate (DG) junction-less (JL) transistor with physical barriers is
proposed for one-transistor dynamic random-access memory (1T DRAM) application. In this …

This paper reports on the usefulness of shell-doped (SD) junctionless (JL) transistor
architecture for operation as capacitorless dynamic random-access memory (1T-DRAM). SD …

This article showcases a junctionless (JL)/accumulation mode (AM) transistor connected
with an access JL transistor-based capacitorless dynamic random access memory (2T …

In this work, we revisit the lateral band-to-band tunneling (L-BTBT) gate-induced drain
leakage (GIDL) in gate-all-around (GAA) nanowire field-effect transistors (NWFETs) which is …

In this paper, we propose a novel structure of doping-less 1T-DRAM with raised body and
Schottky contact to source/drain regions which uses thermionic emission to generate …

A key indicator of multi-functional attributes of a transistor is technological competiveness vis-
à-vis existing architectures. Apart from the well-known logic circuit implementation through …

This paper proposes a one-transistor dynamic random-access memory (1 T DRAM) with
local partial insulator (LPI) to increase data retention time. Proposed 1 T DRAM cell has …

This paper proposes a one transistor dynamic random access memory (1T DRAM) with
localized partial insulator (LPI) to increase data retention time. Proposed 1T DRAM cell is …

This article reports on logic and memory functionality of vertically stacked bidirectional
junctionless (BiJL) transistor, which can be operated as nMOS or pMOS depending on the …

In this work, we report on the opportunities to enhance the retention time (RT) of an
accumulation mode capacitorless DRAM (1T-DRAM) through appropriate material …