Multi-channel multi-port memory
F Wang, S Gu, MM Nowak - US Patent 8,380,940, 2013 - Google Patents
(57) ABSTRACT A multi-channel multi-port memory is disclosed. In a particu lar
embodiment, the multi-channel memory includes a plu rality of channels responsive to a …
embodiment, the multi-channel memory includes a plu rality of channels responsive to a …
Multi-port memory and computer system provided with the same
K Kajigaya - US Patent 8,006,026, 2011 - Google Patents
A multi-port memory, comprising: m (m≧ 2) input/output ports independent of one another; n
(n≧ 2) memory banks independent of one another; and a route switching circuit capable of …
(n≧ 2) memory banks independent of one another; and a route switching circuit capable of …
Time division multiplexed multiport memory implemented using single-port memory elements
D Lewis - US Patent 8,806,259, 2014 - Google Patents
BACKGROUND Integrated circuits such as programmable integrated cir cuits often contain
volatile memory elements in the form of static random access memory (SRAM) cells. Volatile …
volatile memory elements in the form of static random access memory (SRAM) cells. Volatile …
Memory device with a clocking mechanism
JM Brown, VJ Vankayala, TA Dauenbaugh - US Patent 10,395,702, 2019 - Google Patents
A memory device includes a first data driver configured to send a first data according to a
first clock signal; a first data port electrically coupled to the first data driver, the first data port …
first clock signal; a first data port electrically coupled to the first data driver, the first data port …
Memory architecture having ranks with variable data widths
AT Schnell - US Patent 11,798,604, 2023 - Google Patents
Ranks of one or more memory modules can have variable data widths. As part of initializing
a memory architecture, a memory controller can be configured to detect the data width of the …
a memory architecture, a memory controller can be configured to detect the data width of the …
Memory device with a clocking mechanism
JM Brown, VJ Vankayala, TA Dauenbaugh - US Patent 11,742,008, 2023 - Google Patents
A memory device includes a first data driver configured to send according to a first clock
signal a first data to a first data port; a second data driver configured to send according to a …
signal a first data to a first data port; a second data driver configured to send according to a …
Memory device with a clocking mechanism
JM Brown, VJ Vankayala, TA Dauenbaugh - US Patent 11,024,349, 2021 - Google Patents
A memory device includes a first data driver configured to send a first data according to a
first clock signal; a first data port electrically coupled to the first data driver, the first data port …
first clock signal; a first data port electrically coupled to the first data driver, the first data port …
Time division multiplexed multiport memory implemented using single-port memory elements
D Lewis - US Patent 9,298,211, 2016 - Google Patents
BACKGROUND Integrated circuits such as programmable integrated cir cuits often contain
volatile memory elements in the form of static random access memory (SRAM) cells. Volatile …
volatile memory elements in the form of static random access memory (SRAM) cells. Volatile …