Defense-in-depth: A recipe for logic locking to prevail

MT Rahman, MS Rahman, H Wang, S Tajik, W Khalil… - Integration, 2020 - Elsevier
Logic locking/obfuscation has emerged as an auspicious solution for protecting the
semiconductor intellectual property (IP) from the untrusted entities in the design and …

IP protection and supply chain security through logic obfuscation: A systematic overview

K Shamsi, M Li, K Plaks, S Fazzari, DZ Pan… - ACM Transactions on …, 2019 - dl.acm.org
The globalization of the semiconductor supply chain introduces ever-increasing security and
privacy risks. Two major concerns are IP theft through reverse engineering and malicious …

Covert gates: Protecting integrated circuits with undetectable camouflaging

B Shakya, H Shen, M Tehranipoor… - IACR transactions on …, 2019 - tches.iacr.org
Integrated circuit (IC) camouflaging has emerged as a promising solution for protecting
semiconductor intellectual property (IP) against reverse engineering. Existing methods of …

Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging

S Patnaik, M Ashraf, O Sinanoglu… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Layout camouflaging can protect the intellectual property of modern circuits. Most prior art,
however, incurs excessive layout overheads and necessitates customization of active …

Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices

N Rangarajan, S Patnaik, J Knechtel… - … on Emerging Topics …, 2020 - ieeexplore.ieee.org
The era of widespread globalization has led to the emergence of hardware-centric security
threats throughout the IC supply chain. Prior defenses like logic locking, layout …

Hardware functional obfuscation with ferroelectric active interconnects

T Yu, Y Xu, S Deng, Z Zhao, N Jao, YS Kim… - Nature …, 2022 - nature.com
Existing circuit camouflaging techniques to prevent reverse engineering increase circuit-
complexity with significant area, energy, and delay penalty. In this paper, we propose an …

Protect your chip design intellectual property: An overview

J Knechtel, S Patnaik, O Sinanoglu - Proceedings of the International …, 2019 - dl.acm.org
The increasing cost of integrated circuit (IC) fabrication has driven most companies to" go
fabless" over time. The corresponding outsourcing trend gave rise to various attack vectors …

Experimental demonstration of gate-level logic camouflaging and run-time reconfigurability using ferroelectric FET for hardware security

S Dutta, B Grisafe, C Frentzel, Z Enciso… - … on Electron Devices, 2021 - ieeexplore.ieee.org
Outsourcing of integrated circuit (IC) manufacturing and increasing sophistication of IC
reverse engineering techniques have unleashed security threats such as intellectual …

A modern approach to IP protection and trojan prevention: Split manufacturing for 3D ICs and obfuscation of vertical interconnects

S Patnaik, M Ashraf, O Sinanoglu… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Split manufacturing (SM) and layout camouflaging (LC) are two promising techniques to
obscure integrated circuits (ICs) from malicious entities during and after manufacturing …

A Module-Level Configuration Methodology for Programmable Camouflaged Logic

J Wang, Z Chen, J Zhang, Y Xu, T Yu, Z Zheng… - ACM Transactions on …, 2024 - dl.acm.org
Logic camouflage is a widely adopted technique that mitigates the threat of intellectual
property (IP) piracy and overproduction in the integrated circuit (IC) supply chain …