Stereo: Assignment and scheduling in MPSoC under process variation by combining stochastic and decomposition approaches

B Khodabandeloo, A Khonsari… - IEEE Transactions …, 2022 - ieeexplore.ieee.org
Aggressive scaling in integrated circuits creates new challenges such as an increase in
power density, temperature, and especially process variation in designing Multiprocessor …

Power reduction in HPC data centers: a joint server placement and chassis consolidation approach

A Pahlavan, M Momtazpour, M Goudarzi - The Journal of Supercomputing, 2014 - Springer
Size and number of high-performance data centers are rapidly growing all around the world
in recent years. The growth in the leakage power consumption of servers along with its …

Data center power reduction by heuristic variation-aware server placement and chassis consolidation

A Pahlavan, M Momtazpour… - The 16th CSI …, 2012 - ieeexplore.ieee.org
The growth in number of data centers and its power consumption costs in recent years,
along with ever increasing process variation in nanometer technologies emphasizes the …

Variation-aware server placement and task assignment for data center power minimization

A Pahlavan, M Momtazpour… - 2012 IEEE 10th …, 2012 - ieeexplore.ieee.org
Size and number of data centers are fast growing all over the world and their increasing total
power consumption is a worldwide concern. Moreover, increase in the amount of process …

Scenario-based quasi-static task mapping and scheduling for temperature-efficient MPSoC design under process variation

B Khodabandeloo, A Khonsari, F Gholamian… - Microprocessors and …, 2014 - Elsevier
Nowadays, employing the worst case analysis is the most common approach to provide
unified static task mapping–scheduling plans on MPSoCs. Since the whole design space …

A scheduling algorithm in the randomly heterogeneous multi-core processor

Y Liu, Y Li, Y Zhao, X Chen - 2016 12th International …, 2016 - ieeexplore.ieee.org
The increasing scale of multi-core processors are likely to be randomly heterogeneous by
design or because of diversity and flaws. The latter type of heterogeneity introduced by …

多核嵌入式系统内联网络优化调度

杜家宜, 李仁发, 堵琳娜 - 计算机工程与科学, 2016 - joces.nudt.edu.cn
处理核之间的通信问题是多核系统中不可避免的问题, 根据具体应用, 进行核间内联网络的定制
和设计是一个可行的研究方向. 针对该问题提出了任务节点的通信调度算法 …

Yield-aware joint die packing, die matching and static thread mapping for hard real-time 3D embedded CMPs

A Siavashi, M Momtazpour - Microprocessors and Microsystems, 2022 - Elsevier
This paper addresses the problem of performance and thermal yield maximization for hard
real-time 3D embedded chip multiprocessors. We propose a process variation-aware …

Task assignment and scheduling in MPSoC under process variation: A stochastic approach

B Khodabandeloo, A Khonsari, A Majidi… - 2018 23rd Asia and …, 2018 - ieeexplore.ieee.org
Nowadays, aggressive scaling in integrated circuits brings out new challenges such as
increase in power density, temperature, and process variation in designing Multiprocessor …

Yield‐driven design‐time task scheduling techniques for multi‐processor system on chips under process variation: a comparative study

M Momtazpour, O Assare, N Rahmati… - IET Computers & …, 2015 - Wiley Online Library
Process variation has already emerged as a major concern in design of multi‐processor
system on chips (MPSoC). In recent years, there have been several attempts to bring …