Clock skew scheduling is a common and well known technique to improve the performance
of sequential circuits by exploiting the mismatches in the data path delays. Existing clock …

Complexity of solving a system of difference constraints with variables restricted to a finite set -
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Fishburn developed an algorithm to solve a system of $ m $ difference constraints whose $ n
$ unknowns must take values from a set with $ k $ real numbers [Solving a system of …

The phased clock signals are useful to synchronize the individual modules within a
multiphase digital system and satisfy the complexity of their clock timing requirement. The …

Power consumption has emerged as a key design objective for almost any application. Low
swing/voltage clock distribution was proposed in earlier work as a method to reduce power …

In this paper, we present a variable node clock network and a power model to estimate
leakage power in CMOS processor. Design of clock delivery network is a constrained …