Three-dimensional memory device with discrete self-aligned charge storage elements and method of making thereof
M Tsutsumi, K Kajiwara, RS Makala - US Patent 9,991,277, 2018 - Google Patents
A memory opening can be formed through an alternating stack of insulating layers and
sacrificial material layers over a substrate. A material layer stack containing, from outside to …
sacrificial material layers over a substrate. A material layer stack containing, from outside to …
Three-dimensional memory device containing bonded memory die and peripheral logic die and method of making thereof
A Nishida - US Patent 10,283,493, 2019 - Google Patents
A first die includes a three-dimensional memory device and first copper pads. A second die
includes a peripheral logic circuitry containing CMOS devices located on the semiconductor …
includes a peripheral logic circuitry containing CMOS devices located on the semiconductor …
Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof
KH Kim, M Higashitani, F Toyama… - US Patent 10,510,738, 2019 - Google Patents
2019-01-15 Assigned to SANDISK TECHNOLOGIES LLC reassignment SANDISK
TECHNOLOGIES LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …
TECHNOLOGIES LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …
Multilevel semiconductor device and structure with memory
Z Or-Bach, JW Han - US Patent 10,515,981, 2019 - Google Patents
US10515981B2 - Multilevel semiconductor device and structure with memory - Google
Patents US10515981B2 - Multilevel semiconductor device and structure with memory …
Patents US10515981B2 - Multilevel semiconductor device and structure with memory …
Method of suppressing epitaxial growth in support openings and three-dimensional memory device containing non-epitaxial support pillars in the support openings
H Kimura, S Shimabukuro, S Minagawa… - US Patent …, 2017 - Google Patents
US9576967B1 - Method of suppressing epitaxial growth in support openings and three-dimensional
memory device containing non-epitaxial support pillars in the support openings - Google Patents …
memory device containing non-epitaxial support pillars in the support openings - Google Patents …
Three-dimensional memory device containing vertically isolated charge storage regions and method of making thereof
R Sharangpani, RS Makala, S Kanakamedala… - US Patent …, 2017 - Google Patents
A memory opening can be formed through an alternating stack of insulating layers and
sacrificial material layers provided over a substrate. Annular etch stop material portions are …
sacrificial material layers provided over a substrate. Annular etch stop material portions are …
Multi-tier memory stack structure containing non-overlapping support pillar structures and method of making thereof
P Ravikirthi, J Pachamuthu, J Sabde… - US Patent 9,881,929, 2018 - Google Patents
A first tier structure including a first alternating stack of first insulating layers and first
sacrificial material layers is formed over a substrate. First support openings and first memory …
sacrificial material layers is formed over a substrate. First support openings and first memory …
Three-dimensional memory device containing source select gate electrodes with enhanced electrical isolation
J Pachamuthu, T Pham, H Chien - US Patent 9,659,956, 2017 - Google Patents
A method of manufacturing a three-dimensional memory device includes forming, a bottom
dielectric layer, a bottom sacrificial material layer, and an alternating stack of insulating …
dielectric layer, a bottom sacrificial material layer, and an alternating stack of insulating …
3D semiconductor device and structure
Z Or-Bach, B Cronquist - US Patent 10,840,239, 2020 - Google Patents
H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state
components formed in or on a common substrate including semiconductor components …
components formed in or on a common substrate including semiconductor components …
Three-dimensional memory device having select gate electrode that is thicker than word lines and method of making thereof
K Shigemura, J Ariyoshi, M Tsutsumi, M Sano… - US Patent …, 2018 - Google Patents
A three-dimensional memory device includes an alternating stack of insulating layers and
electrically conductive layers located over a substrate, the alternating stack having a …
electrically conductive layers located over a substrate, the alternating stack having a …