SC Chung - US Patent 9,818,478, 2017 - Google Patents
Building programmable resistive devices in contact holes at the crossover of a plurality of conductor lines in more than two vertical layers is disclosed. There are plurality of first …
SB Herner, T Kumar, CJ Petti - US Patent 7,812,404, 2010 - Google Patents
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SC Chung - US Patent 8,848,423, 2014 - Google Patents
FET technologies can be used as program selectors or One Time Programmable (OTP) element in a programmable resis tive device. Such as interconnect fuse, contact/via fuse …
T Kumar, SB Herner - US Patent 7,875,871, 2011 - Google Patents
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RE Scheuerlein - US Patent 7,829,875, 2010 - Google Patents
A memory cell is described, the memory cell comprising a dielectric rupture antifuse and a layer of a resistivity-switching material arranged electrically in series, wherein the resistivity …
SC Chung - US Patent 9,251,893, 2016 - Google Patents
A method and system for multiple-bit programmable resistive cells having a multiple-bit programmable resistive element and using diode as program selector are disclosed. The …
SC Chung - US Patent 8,913,449, 2014 - Google Patents
In-system repairing or configuring faulty memories after being used in a system. In one embodiment, a memory chip can include at least one OTP memory to store defective …
SC Chung - US Patent 9,076,526, 2015 - Google Patents
Techniques, systems and circuitry for using One-Time Programmable (OTP) memories to function as a Multiple-Time Programmable (MTP) memory. The OTP-for-MTP memory can …
A Schricker, B Herner, M Clark - US Patent 7,824,956, 2010 - Google Patents
In some aspects, a method of forming a memory cell is pro vided that includes (1) forming a first conductor above a Substrate;(2) forming a reversible resistance-switching ele ment …