A review of diode and solar cell equivalent circuit model lumped parameter extraction procedures

A Ortiz-Conde, FJ García-Sánchez… - Facta Universitatis …, 2014 - casopisi.junis.ni.ac.rs
This article presents an up-to-date review of several methods used for extraction of diode
and solar cell model parameters. In order to facilitate the choice of the most appropriate …

New method to extract the model parameters of solar cells from the explicit analytic solutions of their illuminated I–V characteristics

A Ortiz-Conde, FJG Sánchez, J Muci - Solar Energy Materials and Solar …, 2006 - Elsevier
We present a new method to extract the intrinsic and extrinsic model parameters of
illuminated solar cells containing parasitic series resistance and shunt conductance. The …

Temperature dependence of analog performance, linearity, and harmonic distortion for a ge-source tunnel FET

E Datta, A Chattopadhyay, A Mallik… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
In this article, we report an investigation of the effects of variation in temperature in the range
of 300-450 K on the analog performance and harmonic distortion (HD) characteristics of a …

Integral function method for determination of nonlinear harmonic distortion

A Cerdeira, MA Alemán, M Estrada, D Flandre - Solid-State Electronics, 2004 - Elsevier
The analysis of harmonic distortion is of prime importance for the analog and mixed
integrated circuits. Recently we presented a new integral function method (IFM), based on a …

Relative study of analog performance, linearity, and harmonic distortion between junctionless and conventional SOI FinFETs at elevated temperatures

E Datta, A Chattopadhyay, A Mallik - Journal of Electronic Materials, 2020 - Springer
This paper reports a comparative study of the analog performance, linearity and harmonic
distortion characteristics between junctionless (JL) and conventional silicon-on-insulator …

Extraction of non-ideal junction model parameters from the explicit analytic solutions of its I–V characteristics

A Ortiz-Conde, FJG Sánchez - Solid-state electronics, 2005 - Elsevier
In modeling semiconductor junctions the extraction of the model's parameters is often
hindered by the presence of parasitic series resistance and shunt conductance. We propose …

Advantages of the graded-channel SOI FD MOSFET for application as a quasi-linear resistor

A Cerdeira, MA Alemán, MA Pavanello… - … on Electron Devices, 2005 - ieeexplore.ieee.org
In this paper, we analyze the previously unexpected advantages of asymmetric channel
engineering on the MOS resistance behavior in quasi-linear operation, such as used in …

Effect of source/drain lateral straggle on distortion and intrinsic performance of asymmetric underlap DG-MOSFETs

K Koley, A Dutta, SK Saha… - IEEE Journal of the …, 2014 - ieeexplore.ieee.org
This paper presents a systematic study of the effect of source/drain (S/D) implant lateral
straggle on the RF performance of the symmetric and asymmetric underlap double gate …

Harmonic distortion analysis of double gate graded-channel MOSFETs operating in saturation

RT Doria, A Cerdeira, JP Raskin, D Flandre… - Microelectronics …, 2008 - Elsevier
In this work we present an analysis of harmonic distortion (HD) in graded-channel (GC) gate-
all-around (GAA) devices operating in saturation region for analog applications. The study …

A comparison of analog performance, linearity, and distortion characteristics between symmetric InGaAs and asymmetric InGaAs/InP MOSFETs

E Datta, A Chattopadhyay… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
In this article, we report an investigation of analog performance, linearity, and harmonic
distortion (HD) characteristics for both symmetric and asymmetric InGaAs n-channel …