Virtual-Peripheral-in-the-Loop: A Hardware-in-the-Loop Strategy to Bridge the VP/RTL Design-Gap

S Ahmadi-Pour, P Pieper, R Drechsler - arXiv preprint arXiv:2311.00442, 2023 - arxiv.org
Virtual Prototypes act as an executable specification model, offering a unified behavior
reference model for SW and HW engineers. However, between the VP and the HW still …

[图书][B] Formal and Practical Techniques for the Complex System Design Process Using Virtual Prototypes: Better Early Than Never

P Pieper, R Drechsler - 2024 - books.google.com
This book deals with formal and practical approaches for early fast modeling and verification
of complex digital processor hardware and software using SystemC-based virtual …

Hardware and Environment Modeling

P Pieper, R Drechsler - Formal and Practical Techniques for the Complex …, 2024 - Springer
This chapter explores the role of RISC-V in the Internet of Things (IoT) era, emphasizing its
popularity due to its open and free instruction set architecture. The chapter introduces virtual …

Pascal Pieper

R Drechsler, BE than Never - Springer
Modern System-on-Chip (SoC) designs are produced in increasingly faster project cycle
times, while their complexity rises together with the need of a continuously decreasing cost …

Stepwise SystemC/TLM-2 models structuring and optimizations

SH Sfar, R Tourki, I Bennour - 2016 11th International Design & …, 2016 - ieeexplore.ieee.org
Transaction level modelling (TLM) is among the most promising electronic system level
(ESL) methodologies to handle the growing complexity of ESL designs. The last SystemC …

TLM-2 base protocol analysis for model-driven design

SH Sfar, R Tourki, I Bennour - 2017 International Conference …, 2017 - ieeexplore.ieee.org
The SoC design cost is not only dependent on implementation and manufacturing
techniques, but also on the used methodologies and design tools. Transaction level …