Improving error correction codes for multiple-cell upsets in space applications

J Gracia-Moran, LJ Saiz-Adalid… - … Transactions on Very …, 2018 - ieeexplore.ieee.org
Currently, faults suffered by SRAM memory systems have increased due to the aggressive
CMOS integration density. Thus, the probability of occurrence of single-cell upsets (SCUs) or …

Design of radiation-hardened memory cell by polar design for space applications

L Hao, L Liu, Q Shi, B Qiang, Z Li, N Liu, C Dai… - Microelectronics …, 2023 - Elsevier
This paper proposed a radiation-hardened memory cell (RHMC12T) by polar design for
space applications. The proposed cell has the following advantages:(1) it can tolerate all …

A survey on two-dimensional Error Correction Codes applied to fault-tolerant systems

D Freitas, C Marcon, J Silveira, L Naviner… - Microelectronics …, 2022 - Elsevier
The number of memory faults operating in radiation environments increases with the
electronic device miniaturization. One-dimensional (1D) Error Correction Codes (ECCs) are …

An efficient EDAC approach for handling multiple bit upsets in memory array

RC Goerl, PRC Villa, LB Poehls, EA Bezerra… - Microelectronics …, 2018 - Elsevier
Ionizing radiation and electromagnetic interference (EMI) can cause single event upset
(SEU) in memory elements. This threat is one of the major concerns when considering the …

An extensible code for correcting multiple cell upset in memory arrays

F Silva, J Silveira, J Silveira, C Marcon… - Journal of Electronic …, 2018 - Springer
As the microelectronics technology continuously advances to deep submicron scales, the
occurrence of Multiple Cell Upset (MCU) induced by radiation in memory devices becomes …

A universal, low-delay, SEC-DEC-TAEC code for state register protection

M Dong, W Pan, Z Qiu, X Qi, L Zheng, H Liu - IEEE Access, 2022 - ieeexplore.ieee.org
Finite State Machine (FSM) is widely used in electronic systems and its reliability is critical to
the system. Ionizing radiation induced soft error is one of the major concerns in the design of …

CLC-A: An adaptive implementation of the Column Line Code (CLC) ECC

F Silva, A Muniz, J Silveira… - 2020 33rd Symposium on …, 2020 - ieeexplore.ieee.org
Column-Line-Code (CLC) is an Error Correction Code (ECC) designed to correct multiple
errors in memory devices for critical applications. CLC has originally two decoder modes …

Correction of adjacent errors with low redundant matrix error correction codes

J Gracia-Moran, LJ Saiz-Adalid… - 2018 Eighth Latin …, 2018 - ieeexplore.ieee.org
The continuous growth of the integration scale in CMOS circuits has derived in an increase
in the memory systems capacity, but also in their fault rate. In this way, the probabilities of …

New low power and fast SEC-DAEC and SEC-DAEC-TAEC codes for memories in space application

S Tripathi, J Jana, J Bhaumik - Integration, 2023 - Elsevier
Multiple cell upset (MCU) caused by cosmic radiation is a serious issue related to the
reliability of static random access memories (SRAMs) in space application. Due to radiation …

An efficient, low-cost ECC approach for critical-application memories

F Silva, O Lima, W Freitas, F Vargas, J Silveira… - Proceedings of the 30th …, 2017 - dl.acm.org
Multiple Cell Upsets (MCUs) induced by ionizing radiation in memories are becoming more
likely to happen due to the continuous technology scaling down. Error Correction Codes …