Statistical static timing analysis: A survey

C Forzan, D Pandini - Integration, 2009 - Elsevier
As the device and interconnect physical dimensions decrease steadily in modern nanometer
silicon technologies, the ability to control the process and environmental variations is …

An efficient SRAM yield analysis and optimization method with adaptive online surrogate modeling

J Yao, Z Ye, Y Wang - IEEE Transactions on Very Large Scale …, 2014 - ieeexplore.ieee.org
SRAM cells usually require extremely low failure rate or equivalently extremely high
production yield, making it impractical to perform yield analysis using Monte Carlo (MC) …

Semiconductor manufacturing final test yield optimization and wafer acceptance test parameter inverse design using multi-objective optimization algorithms

D Jiang, W Lin, N Raghavan - Ieee Access, 2021 - ieeexplore.ieee.org
In the semiconductor industry, many previous optimization studies have been carried out at
the integrated circuit front-end design phase to identify optimal circuit elements' size and …

DFM-aware fault model and ATPG for intra-cell and inter-cell defects

A Sinha, S Pandey, A Singhal, A Sanyal… - … Test Conference (ITC …, 2017 - ieeexplore.ieee.org
Yield improvement, yield ramp, and defect screening have been major areas of concern for
the semiconductor industry as technology nodes have advanced. Much effort has been …

Unified testing and security framework for wireless network-on-chip enabled multi-core chips

A Vashist, A Keats, SMP Dinakarrao… - ACM Transactions on …, 2019 - dl.acm.org
On-chip wireless interconnects have been demonstrated to improve the performance and
energy consumption of data communication in Network-on-Chips (NoCs). However, the …

OCBA in the yield optimization of analog integrated circuits by evolutionary algorithms

I Guerra-Gomez, E Tlelo-Cuautle… - … on Circuits and …, 2015 - ieeexplore.ieee.org
An strategy based on the optimal computing budget allocation (OCBA) approach is
presented to reduce the simulation cost in the yield optimization of analog integrated circuits …

Data learning based diagnosis

LC Wang - 2010 15th Asia and South Pacific Design …, 2010 - ieeexplore.ieee.org
Traditional diagnosis of defects is based on an assumed fault model. A failing chip is
diagnosed to find the subset of faults that can best explain the failure. This paper illustrates a …

Formal verification of analog circuits in the presence of noise and process variation

R Narayanan, B Akbarpour, MH Zaki… - … , Automation & Test …, 2010 - ieeexplore.ieee.org
We model and verify analog designs in the presence of noise and process variation using
an automated theorem prover, MetiTarski. Due to the statistical nature of noise, we propose …

Parameter-importance based Monte-Carlo technique for variation-aware analog yield optimization

S Kondamadugula, SR Naidu - Proceedings of the 26th edition on Great …, 2016 - dl.acm.org
The Monte-Carlo method is the method of choice for accurate yield estimation. Standard
Monte-Carlo methods suffer from a huge computational burden even though they are very …

Accelerated evolutionary algorithms with parameterimportance based population initialization for variation-aware analog yield optimization

S Kondamadugula, SR Naidu - 2016 IEEE 59th international …, 2016 - ieeexplore.ieee.org
Evolutionary algorithms are popularly used methods to estimate yield for faster
convergence. Monte-Carlo is the method of choice for accurate yield estimation. Standard …