Placement for very-large-scale integrated (VLSI) circuits is one of the most important steps
for design closure. This paper proposes a novel GPU-accelerated placement framework …

Taskflow aims to streamline the building of parallel and heterogeneous applications using a
lightweight task graph-based approach. Taskflow introduces an expressive task graph …

An evident challenge ahead for the integrated circuit (IC) industry is the investigation and
development of methods to reduce the design complexity ensuing from growing process …

As Moore's law has provided an exponential increase in chip transistor density, the unique
features we can now include in large chips are no longer predominantly limited by area …

The ever-increasing power of graphics processing units (GPUs) has opened new
opportunities for accelerating static timing analysis (STA) to a new milestone. Developing a …

Placement is essential in very large-scale integration (VLSI) physical design, as it directly
affects the design cycle. Despite extensive prior research on placement, achieving fast and …

Macro placement is a critical very large-scale integration (VLSI) physical design problem
that significantly impacts the design power-performance-area (PPA) metrics. This paper …

We provide open, transparent implementation and assessment of Google Brain's deep
reinforcement learning approach to macro placement (Nature) and its Circuit Training (CT) …

Many EDA applications are extremely sparse, irregular, and control-flow intensive.
Parallelizing this type of application can benefit from the ability to express dynamic task …

Placement serves as a fundamental step in VLSI physical design. Recently, GPU-based
global placer DREAMPlace [1] demonstrated its superiority over CPU-based global placers …