In this paper, we present a new test data compression method for intellectual property (IP)
cores testing, based on the reuse of parts of dictionary entries. Two approaches are …

This paper presents a new pattern run-length compression method whose decompressor is
simple and easy to implement. It encodes 2| n| runs of compatible or inversely compatible …

Test data compression is an efficient methodology in reducing large test data volume for
system-on-a-chip designs. In this paper, a variable-to-variable length compression method …

Growing test data volume and excessive test application time are two serious concerns in
scan-based testing for SoCs. This paper presents an efficient test-independent compression …

为了解决系统芯片(SoC) 测试过程中自动测试设备(ATE) 在存储空间以及带宽等方面所面临的
问题, 本文提出了一种新的基于变长数据块相关性统计的测试数据压缩和解压方法 …

A precomputed core test set contains a large number of don't cares (x's) that can be
effectively exploited to improve test data compression (TDC). Extending pattern run-length …

Abstract The Count Compatible Pattern Run-Length (CCPRL) coding compression method
is proposed to further improve the compression ratio. Firstly, a segment of pattern in the test …

Manufacturing of semiconductor devices at the sub‐micron level has led to the introduction
of huge number of faults. To ensure the quality of integrated circuits (ICs), enormous amount …

The advancement in technologies has been increasing with increase in integrating scales
which allows fabricating millions of transistors on a chip. This demands the efficient testing …

This paper presents a new compression technique for testing the intellectual property (IP)
cores in system-on-chips. The pattern run-length compression applies the well-known run …