This paper explores new advanced quantization schemes for fast Fourier transform (FFT)
architectures. In previous works, FFT quantization has been treated theoretically or with the …

This paper analyzes the benefits of using half-unit-biased (HUB) formats to implement
floating-point (FP) arithmetic under a round-to-nearest mode from a quantitative point of …

The increasing complexity of new digital signal processing (DSP) applications is forcing the
use of floating point (FP) numbers in their hardware implementations. In this brief, we …

Due to growth in demand for high-performance applications that require high numerical
stability and accuracy, the need for floating-point FPGA has been increased. In this work, an …

Half-Unit-Biased format is based on shifting the representation line of the binary numbers by
half Unit in theLast Place. The main feature of this format is that the roundto nearest is …

High-throughput QR decomposition is a key operation in many advanced signal processing
and communication applications. For some of these applications, using floating-point …

This chapter first defines the accuracy of an operator with respect to the operation it is
supposed to implement, discussing in particular various approaches to the notion of …

The end of Dennad scaling, as well as the arrival of the post-Moore era, has resulted in a
slowdown in the improvement of modern computer systems' performance. As a result, the …

This paper explores new advanced quantization schemes for fast Fourier transform (FFT)
architectures. In previous works, FFT quantization has been treated theoretically or with the …

Rounding is mostly performed on floating point numbers. Rounding can be made simpler by
using HUB format. The HUB based floating point adder is termed as Architecture A. But …