An improved circuit board for an implantable stimulator device is disclosed having
components embedded within the device's circuit board, and in particular having embedded …

RF circuit structure may also include an isolation layer coupled to the SOI layer. The
integrated RF circuit structure may further include a filter, composed of inductors and …

US8921976B2 - Using backside passive elements for multilevel 3D wafers alignment
applications - Google Patents US8921976B2 - Using backside passive elements for multilevel 3D …

(57) ABSTRACT A semiconductor structure includes backside dummy plugs embedded in a
substrate. The backside dummy plugs can be a conductive structure that enhances vertical …

(57) ABSTRACT A semiconductor device may include a transistor gate in a device layer; an
interconnect layer over the device layer; and an air gap extending through the interconnect …

(57) ABSTRACT A semiconductor device may include a transistor gate in a device layer; an
interconnect layer over the device layer; and an air gap extending through the interconnect …

(57) ABSTRACT A method of fabricating through Substrate Vias is disclosed. In one aspect,
vias are etched from the backside of the substrate down to shallow trench isolation (STI) or …

The formation of through silicon vias (TSVs) in an integrated circuit (IC) die or wafer is
described in which the TSV is formed in the integration process prior to contact or …

The formation of bonding pad protective layer over exposed bonding pad materials between
stacked integrated circuit (IC) dies or wafers is described in preferred embodiments in which …

(57) ABSTRACT A method of manufacturing a semiconductor substrate struc ture for use in a
semiconductor Substrate stack system is presented. The method includes a semiconductor …