Systems and methods to perform distributive ECC operations are disclosed. A method
includes, in a controller of a memory device, receiving data including a data block and main …

Provided are an encoder and a syndrome computer for cyclic codes which process M
codeword symbols per cycle where M is greater than or equal to one, whereby the encoder …

The present invention discloses a processor comprising three-dimensional memory (3D-M)
array (3D-processor). Instead of logic-based computation (LBC), the 3D-processor uses …

Methods and apparatus create codewords of n-state symbols having one of 3 or more states
with n-state check symbols. Check symbols are created from independent expressions …

A configurable processor comprises at least an array of configurable computing elements
(CCE's). Each CCE comprises at least a three-dimensional (3-D) memory (3D-M) array; an …

An apparatus having a first circuit and a second circuit is disclosed. The first circuit may (i)
generate a decoded code word by decoding a first codeword a plurality of times based on a …

A configurable processor comprises a memory die and a logic die. The memory die
comprises a programmable memory array for storing a look-up table (LUT) for a …

The present invention discloses a first preferred processor comprising a fixed look-up table
circuit (LTC) and a writable LTC. The fixed LTC realizes at least a common function while the …

The Subject matter disclosed herein provides an outer coding framework for reducing the
correlation between packet errors in a wireless network. In one aspect, there is provided a …

An efficient Chien search method in Reed-Solomon decoding is adapted for use in a
processor having a parallel processing instruction set. The method includes the following …