S Mittal - ACM Computing Surveys (CSUR), 2017 - dl.acm.org
As the number of on-chip cores and memory demands of applications increase, judicious management of cache resources has become not merely attractive but imperative. Cache …
In current systems, memory accesses to a DRAM chip must obey a set of minimum latency restrictions specified in the DRAM standard. Such timing parameters exist to guarantee …
O Mutlu, L Subramanian - Supercomputing frontiers and …, 2014 - superfri.susu.ru
The memory system is a fundamental performance and energy bottleneck in almost all computing systems. Recent system design, application, and technology trends that require …
Approximate computing explores opportunities that emerge when applications can tolerate error or inexactness. These applications, which range from multimedia processing to …
Extensive research has been carried out to improve cache replacement policies, yet designing an efficient cache replacement policy that incurs low hardware overhead remains …
C Chou, A Jaleel, MK Qureshi - ACM SIGARCH Computer Architecture …, 2015 - dl.acm.org
Die stacking memory technology can enable gigascale DRAM caches that can operate at 4x- 8x higher bandwidth than commodity DRAM. Such caches can improve system performance …
Achieving system fairness is a major design concern in current multicore processors. Unfairness arises due to contention in the shared resources of the system, such as the LLC …
Data prefetching and cache replacement algorithms have been intensively studied in the design of high performance microprocessors. Typically, the data prefetcher operates in the …
G Pekhimenko, T Huberty, R Cai… - 2015 IEEE 21st …, 2015 - ieeexplore.ieee.org
We introduce a set of new Compression-Aware Management Policies (CAMP) for on-chip caches that employ data compression. Our management policies are based on two key …