Survey on real-time networks-on-chip
Multi-Processor Systems-on-Chip (MPSoCs) have emerged as an evolution trend to meet
the growing complexity of embedded applications with increasing computation parallelism …
the growing complexity of embedded applications with increasing computation parallelism …
Fast simulation of networks-on-chip with priority-preemptive arbitration
LS Indrusiak, J Harbin, OM Dos Santos - ACM Transactions on Design …, 2015 - dl.acm.org
An increasingly time-consuming part of the design flow of on-chip multiprocessors is the
simulation of the interconnect architecture. The accurate simulation of state-of-the art …
simulation of the interconnect architecture. The accurate simulation of state-of-the art …
A self-routing on-chip network
AY Oruç - IEEE Transactions on Parallel and Distributed …, 2016 - ieeexplore.ieee.org
This paper introduces a new nonblocking self-routing network, called a multi-root binary
tree, which may be used to interconnect the cores in multicore chips. The multi-root binary …
tree, which may be used to interconnect the cores in multicore chips. The multi-root binary …
[PDF][PDF] Modeling and performance evaluation of 2d and 3d nocs using discrete event simulation
N Mediouni, SB Abid, O Kallel… - International Journal of …, 2016 - researchgate.net
Network on Chips are a method of interconnecting Processing Elements, such as
processors and communication controllers, through a high scalability interconnect …
processors and communication controllers, through a high scalability interconnect …
[引用][C] A Distance-Based Side-Channel Attack in Non Uniform Cache and Possible Defenses
F Mahmud, S Kim, HS Chawla, P Majumdar, J Huang…