This article describes the first public implementation and evaluation of the latest version of
the RISC-V hypervisor extension (H-extension v0. 6.1) specification in a Rocket chip core …

When adopting multi-core systems for safety-critical applications, certification requirements
mandate bounding the delays incurred in accessing shared resources. This is the case of …

The evolution of generational networks has stimulated the growth of delay-sensitive traffic,
destabilizing the already incapacitated existing network infrastructure. Due to time …

Consolidating hard real-time systems onto modern multi-core Systems-on-Chip (SoC) is an
open challenge. The extensive sharing of hardware resources at the memory hierarchy …

The grasshopper optimization algorithm (GOA) is a novel metaheuristic algorithm. Because
of its easy deployment and high accuracy, it is widely used in a variety of industrial scenarios …

In this paper, we identify that bank contention in the shared last-level cache (LLC) of
multicore processors can cause significant execution time slowdown to cross-core victims …

In this paper, we present a solution to the industrial challenge put forth by ARM in 2022. We
systematically analyze the effect of shared resource contention to an augmented reality …

As cyber-physical systems have become increasingly complex, rising computational
demand has led to the ubiquitous use of multicore processors in embedded environments …

The sharp increase in demand for performance has prompted an explosion in the complexity
of modern multi-core embedded systems. This has lead to unprecedented temporal …

Modern latency-sensitive and real-time systems often use multi-core platforms; thus, tasks
on different cores share certain hardware resources, such as the memory bus and certain …