W Han, M Arafa, BS Morris, M Prakash… - US Patent …, 2018 - Google Patents
Methods and apparatus related to supporting both DDR (Double Data Rate) and NVM (Non- Volatile Memory) DIMM (Dual Inline Memory Module) on the same memory slot are …
B Nale, J Zhu, TM Quach - US Patent 10,747,605, 2020 - Google Patents
Provided are a method and apparatus for providing a host memory controller write credits for write commands. A host memory controller coupled to a memory module over a bus …
B Nale, J Zhu, TM Quach - US Patent 10,579,462, 2020 - Google Patents
Provided are a method and apparatus for using an error signal to indicate a write request error and write request acceptance performing error handling operations using error signals …
B Nale - US Patent 10,185,618, 2019 - Google Patents
Provided are a method and apparatus for selecting one of a plurality of bus interface configurations to use. Selection is made of a first bus interface configuration having a first …
D Ichimura - US Patent 10,453,472, 2019 - Google Patents
A parameter prediction device includes: an environmental characteristic acquirer that acquires an environmental characteristic quantity set which quantifies one or more …
MD Richter, M Balb - US Patent 11,354,064, 2022 - Google Patents
Methods, systems, and devices for detection of illegal commands are described. A memory device, such as a dynamic random access memory (DRAM), may receive a command from a …
B Nale - US Patent 10,152,370, 2018 - Google Patents
Provided are a method and apparatus for determining a timing adjustment of output to a host memory controller in a first memory module coupled to a host memory controller and a …
B Nale, JV Lovelace, MM Nachimuthu… - US Patent …, 2017 - Google Patents
Provided are a method and apparatus for method and apparatus for encoding registers in a memory module. A mode register command is sent to the memory module over a bus …
KN Kim - US Patent 8,564,341, 2013 - Google Patents
A delayed lock loop (DLL) circuit includes: a phase conversion control unit configured to latch and drive a phase comparison signal in response to the input of a delay enable signal …