An advanced finite element model for BiCMOS process oriented ultra-thin wafer deformation

Stress-induced warpage estimation of advanced semiconductor copper interconnect processes

CC Lee, YH Lin, DP Yang - International Journal of Mechanical Sciences, 2024 - Elsevier
The growth of the semiconductor industry is driven by the demand for electronic products
and high transistor density. However, complex manufacturing processes generate residual …
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Bendable 190-GHz transmitter on 20-μm ultra-thin SiGe BiCMOS

C Hoyer, L Steinweg, Z Cao, V Rieß, L Li… - IEEE Journal on …, 2022 - ieeexplore.ieee.org
This research work presents the fabrication and characterization of ultra-thin fully integrated
transmitter circuits. By moving bendable technology into the 190-GHz band, it is possible to …
被引用次数：6 相关文章

The Chip-Level in-Plane Stress Distribution over BiCMOS Wafers

Z Cao, T Voss, M Wietstruck, C Carta… - 2024 IEEE 24th …, 2024 - ieeexplore.ieee.org
In this study, the in-plane stress distribution over BiCMOS wafers is investigated. Both
analytical and finite element models are exploited to characterize the global and local …
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Characterization of Embedded and Thinned RF Chips

R Yin, HPE Morath, C Hoyer… - 2023 24th European …, 2023 - ieeexplore.ieee.org
This work studies the effect of thinning down chips with transmission line structures for
flexible embedding technology. Test chips with 90 Ω grounded coplanar waveguide (G …
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A Novel Methodology to Predict Process-Induced Warpage in Advanced BEOL Interconnects

YH Lin, CC Lee, CY Liao, MH Lin… - 2023 IEEE …, 2023 - ieeexplore.ieee.org
Process-induced warpage caused by high-density interconnects in the back-end of line
(BEOL) structure, may affect the performance and the reliability of the product during the …
被引用次数：2 相关文章