Node voltage and KCL model-based low leakage volatile and non-volatile 7T SRAM cells

CSH Kumar, BS Kariyappa - IETE Journal of Research, 2023 - Taylor & Francis
The current generation aims for Low power electronic gadgets like cell phones, PDAs, etc.
This urged demand is met through adopting low power reduction techniques. These gadgets …

Design of memory Alias Table based on the SRAM 8T‐Cell

S Abdel‐Hafeez, S Otoom… - International Journal of …, 2022 - Wiley Online Library
A memory Alias Table holds a major role in Register Renaming Unit (RRU), which is
responsible for maintaining the translation between logical registers to physical registers …

Analysis of Cache Memory Circuit for Compute In Memory Applications

AT Patricia, SEP Pushpa… - 2023 4th International …, 2023 - ieeexplore.ieee.org
The rapid development of Artificial Intelligence computations requires efficient SRAMs for
Compute In Memory (CIM) implementations. SRAM cells are all that exists in cache memory …

[PDF][PDF] An efficient novel 6T SRAM cell with optimized layout and design metrics in 45 nm technology

G Gupta, SS Gill - ICTACT Journal on Microelectronics, 2022 - ictactjournals.in
In this paper, a novel 6T SRAM (Static Random Access Memory) cell is proposed with fast
performance, high density, and low power consumption. The proposed configuration has …

A Comparative Study of CMOS and Finfet Sram Cells: Leakage Minimization and Energy Optimization

M Ruj, RVS Reddy - … Conference on Smart Power Control and …, 2024 - ieeexplore.ieee.org
This work presents a comparative analysis of the performance characteristics exhibited by
two established SRAM cell topologies, namely the conventional 6 and the 7 transistor …

[PDF][PDF] Design of SRAM-based 8T-Cell for Memory Alias Table

S Abdel-Hafeez, S Otoom, M Quwaider - CS & IT Conference …, 2021 - csitcp.com
ABSTRACT Memory Alias Table exploits a major role in Register Renaming Unit (RRU) for
maintaining the translation between logical registers to physical registers for the given …

A Performance Analysis of Cmos-Based Design for A Finfet Sram Cell

S Maity, M Mathur - Mathematical Statistician and Engineering …, 2021 - philstat.org
SRAM cells based on long channel devices are somewhat more resilient than optimised
SRAM, but the higher gate-edge direct tunnelling leakage and parasitic capacitances …