Llm for soc security: A paradigm shift

D Saha, S Tarek, K Yahyaei, SK Saha, J Zhou… - IEEE …, 2024 - ieeexplore.ieee.org
As the ubiquity and complexity of system-on-chip (SoC) designs increase across electronic
devices, incorporating security into an SoC design flow poses significant challenges …

Fuzz, penetration, and ai testing for soc security verification: Challenges and solutions

KZ Azar, MM Hossain, A Vafaei, H Al Shaikh… - Cryptology ePrint …, 2022 - eprint.iacr.org
The ever-increasing usage and application of system-on-chips (SoCs) has resulted in the
tremendous modernization of these architectures. For a modern SoC design, with the …

Survey of machine learning for software-assisted hardware design verification: Past, present, and prospect

N Wu, Y Li, H Yang, H Chen, S Dai, C Hao… - ACM Transactions on …, 2024 - dl.acm.org
With the ever-increasing hardware design complexity comes the realization that efforts
required for hardware verification increase at an even faster rate. Driven by the push from …

Survey on machine learning algorithms enhancing the functional verification process

KA Ismail, MAAE Ghany - Electronics, 2021 - mdpi.com
The continuing increase in functional requirements of modern hardware designs means the
traditional functional verification process becomes inefficient in meeting the time-to-market …

Advanced operating conditions search applied in analog circuit verification

C Manolache, A Caranica, M Stănescu… - … and Applications to …, 2022 - ieeexplore.ieee.org
Integrated Circuits (ICs) are now very complex systems with a huge number of components
integrated in a single design. As a consequence, pre-Silicon (pre-Si) analog IC verification …

Enhanced candidate selection algorithm for analog circuit verification

C Manolache, A Caranica, H Cucu… - 2022 International …, 2022 - ieeexplore.ieee.org
In latest years, the complexity and applicability of modern Integrated Circuits (ICs) grew
exponentially, hence the high-pressure to deliver IC designs faster on the market. For safety …

[图书][B] Machine Learning Techniques for Cybersecurity

E Bertino, S Bhardwaj, F Cicala, S Gong, I Karim… - 2023 - Springer
The protection of information and information infrastructures from unauthorized access, use,
disclosure, disruption, modification, or destruction is today more critical than ever as they …

Efficient sequence generation for hardware verification using machine learning

M Gad, M Aboelmaged, M Mashaly… - 2021 28th IEEE …, 2021 - ieeexplore.ieee.org
With the doubling in the number of transistors approximately every two years, modern
systems' complexity is growing exponentially. As the complexity of systems increases, the …

[HTML][HTML] Synthetic Benchmark for Data-Driven Pre-Si Analogue Circuit Verification

C Manolache, C Andronache, A Guzu, A Caranica… - Electronics, 2024 - mdpi.com
As the demand for more complex circuits increases, so does the duration of creating and
testing them. The most time-consuming task in circuit development is notoriously the …

Hybrid Optimized Verification Methodology using Deep Reinforcement Neural Network

N Bhuvaneswary, J Deny… - Journal of Intelligent & …, 2023 - content.iospress.com
Abstract Universal Verification Methodology (UVM) caters to an essential role in verifying the
different categories of circuits ranging from small-scale chips to complex system-on-chip …