Influence of gate and channel engineering on multigate MOSFETs-A review
R Ramesh - Microelectronics journal, 2017 - Elsevier
The design of CMOS circuits using nanoscale MOSFET has become very difficult nowadays
as device modeling faces new challenges such as short channel effects and mobility …
as device modeling faces new challenges such as short channel effects and mobility …
A rigorous simulation based study of gate misalignment effects in gate engineered double-gate (DG) MOSFETs
The double-gate (DG) Metal–Oxide-Semiconductor Field-Effect-Transistors (MOSFETs) are
the front runner among the sub-100 nm devices because both front and back gate of DG …
the front runner among the sub-100 nm devices because both front and back gate of DG …
Parasitic-aware common-centroid FinFET placement and routing for current-ratio matching
The FinFET technology is regarded as a better alternative for modern high-performance and
low-power integrated-circuit design due to more effective channel control and lower power …
low-power integrated-circuit design due to more effective channel control and lower power …
Impact of gate-on-source misalignment on the analog and digital performance of tunnel FET
The tunnel FET (TFET) is considered a promising candidate which can be used in the
design of digital and analog circuits in low-power applications. Due to fabrication tolerances …
design of digital and analog circuits in low-power applications. Due to fabrication tolerances …
A simulation-based study of gate misalignment effects in triple-material double-gate (tmdg) mosfets
S Sarangi, S Bhushan, SG Krishna… - … Mutli-Conference on …, 2013 - ieeexplore.ieee.org
In this work, a simulation based study of gate misalignment effects in triple-material double-
gate (TMDG) MOSFETs is presented. An attempt is made to analyze the effects of gate …
gate (TMDG) MOSFETs is presented. An attempt is made to analyze the effects of gate …
Study of gate misalignment effects in single-material double-gate (SMDG) MOSFET considering source and drain lateral Gaussian doping profile
Un-intentional misalignment in the gate due to fabrication leads to undesirable device
performances. In this paper, effect of gate misalignment has been presented in single …
performances. In this paper, effect of gate misalignment has been presented in single …
An Extensive Simulation Based Study of Symmetrical Work Function Variation of In0.53Ga0.47As/InP DG Hetero MOSFET
SS Mohanty, S Mishra, D Sathpathy… - ICICCT 2019–System …, 2020 - Springer
Abstract Double Gate Metal Oxide Semiconductor Field Effect Transistors (DGMOSFET)
have one of the emerged potential contenders in CMOS VLSI technology due to the fast …
have one of the emerged potential contenders in CMOS VLSI technology due to the fast …
Analysis of gate misalignment effects in double gate junctionless MOSFET
G Jana, M Majumdar, M Chanda… - … On Advances in …, 2018 - ieeexplore.ieee.org
In this paper, the source/drain asymmetric effects due to the misalignment of the gates in the
double gate junctionless transistor have been analyzed in depth. Analytical expression of …
double gate junctionless transistor have been analyzed in depth. Analytical expression of …
Impact of gate-to-source/drain misalignments on source-side injection Schottky barrier charge-trapping memory cells evaluated using numerical programming …
CH Shih, YH Lo, YH Chen, JJ Tsai - Microelectronics Reliability, 2017 - Elsevier
This work numerically elucidates the effects of gate-to-source/drain misalignments on source-
side injection Schottky barrier charge-trapping memory cells. The coupling of Schottky …
side injection Schottky barrier charge-trapping memory cells. The coupling of Schottky …
Influence of systematic gate alignment variations on static characteristics in DG-SB-MOSFETs
The main objective of this paper is to study the effects of variability in the position of the
gates in Double-Gate Schottky-barrier MOSFETs by means of the Monte Carlo method …
gates in Double-Gate Schottky-barrier MOSFETs by means of the Monte Carlo method …