Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability

T Kalavathi Devi, EB Priyanka, P Sakthivel… - … Integrated Circuits and …, 2021 - Springer
Remarkable progress in the field of wireless communication has created a research interest
for Viterbi decoder with long duration of battery life, low power dissipation and portabilty in …

Power and area optimized adaptive Viterbi decoder for high speed communication applications

Namratha, M Bakhar - International Journal of Information Technology, 2023 - Springer
Viterbi algorithm is very popular for error detection and correction in communication systems
and is widely used as a unique method for the process of decoding in convolutional codes …

Algorithm and architecture of configurable joint detection and decoding for MIMO wireless communications with convolutional codes

CA Shen, CP Yu, CH Huang - IEEE Transactions on Very Large …, 2015 - ieeexplore.ieee.org
This paper presents an algorithm and a VLSI architecture of a configurable joint detection
and decoding (CJDD) scheme for multi-input multioutput (MIMO) wireless communication …

Trellis-based QC-LDPC convolutional codes enabling low power decoders

E Pisek, D Rajan, JR Cleveland - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
In this paper, we propose a new type of code called Trellis-based Quasi-Cyclic (TQC)-LDPC
convolutional code, which is a special case of protograph-based LDPC convolutional codes …

A low-power codeword-based Viterbi decoder with fine-grained error detection and correction techniques

SR Kuang, CY Liang, IP Tseng - Arabian Journal for Science and …, 2018 - Springer
Viterbi decoders are one of the most popular error-correcting channel decoders in wireless
communication devices. However, a Viterbi decoder is also usually the dominant module in …

[HTML][HTML] High performance ACS for Viterbi decoder using pipeline T-Algorithm

D Vaithiyanathan, J Nargis, R Seshasayanan - Alexandria Engineering …, 2015 - Elsevier
Viterbi algorithm is the most popular algorithm used to decode the convolution code, but its
computational complexity increases exponentially with the increasing constraint length due …

Design of high speed low power viterbi decoder for TCM system

J Nargis, D Vaithiyanathan… - 2013 International …, 2013 - ieeexplore.ieee.org
Viterbi decoder is the most power hungry module in the Trelli coded modulation system. In
VLSI implementation, reduced chip area, low power consumption, improved speed are the …

Design of a low power and high-speed Viterbi decoder using T-algorithm with normalization

R Surya, K Balasubramanian… - … conference on advances …, 2021 - ieeexplore.ieee.org
There is an ever increasing demand for low power and high speed error control decoders in
digital communication systems. Viterbi decoder, used for decoding convolutional codes finds …

PAPR reduction of OFDM system using PTS method with different modulation techniques

V Sudha, DS Kumar - 2014 International Conference on …, 2014 - ieeexplore.ieee.org
Orthogonal Frequency Division Multiplexing (OFDM) is multicarrier transmission technique.
It is also a strong contender for fourth generation cellular and land mobile radio systems …

ASIC and FPGA Implementation of an Adaptive Convolutional Encoder and Viterbi Decoder

S Kamath, R Mundada, N Gupta… - IETE Journal of …, 2024 - Taylor & Francis
This paper introduces a novel approach and proposes an enhanced microarchitecture for
implementing a high-frequency convolutional encoder and Viterbi decoder using both …