Driven by Moore's law, the chip design complexity is steadily increasing. Electronic Design
Automation (EDA) has been able to cope with the challenging very large-scale integration …

An evident challenge ahead for the integrated circuit (IC) industry is the investigation and
development of methods to reduce the design complexity ensuing from growing process …

The globalization of the Integrated Circuit (IC) supply chain has moved most of the design,
fabrication, and testing process from a single trusted entity to various untrusted third party …

Graph neural networks (GNNs) have pushed the state-of-the-art (SOTA) for performance in
learning and predicting on large-scale data present in social networks, biology, etc. Since …

Process variations and device aging impose profound challenges for circuit designers.
Without a precise understanding of the impact of variations on the delay of circuit paths …

Reasoning high-level abstractions from bit-blasted Boolean networks (BNs) such as gate-
level netlists can significantly benefit functional verification, logic minimization, datapath …

Graph neural networks (GNNs) have attracted increasing attention due to their superior
performance in deep learning on graph-structured data. GNNs have succeeded across …

Hardware obfuscation is a prominent design-for-trust solution that thwarts intellectual
property (IP) piracy and reverse-engineering of integrated circuits (ICs). Researchers have …

Within the Electronic Design Automation (EDA) domain, AI-driven solutions have emerged
as formidable tools, yet they typically augment rather than redefine existing methodologies …

Graph neural networks (GNNs) have shown great success in detecting intellectual property
(IP) piracy and hardware Trojans (HTs). However, the machine learning community has …