[HTML][HTML] Hashgrid: an optimized architecture for accelerating graph computing on fpgas
Large-scale graph processing poses challenges due to its size and irregular memory access
patterns, causing performance degradation in common architectures, such as CPUs and …
patterns, causing performance degradation in common architectures, such as CPUs and …
Multi-criteria optimization of real-time dags on heterogeneous platforms under p-edf
T Cucinotta, A Amory, G Ara, F Paladino… - ACM Transactions on …, 2024 - dl.acm.org
This article tackles the problem of optimal placement of complex real-time embedded
applications on heterogeneous platforms. Applications are composed of directed acyclic …
applications on heterogeneous platforms. Applications are composed of directed acyclic …
Distributed large-scale graph processing on FPGAs
Processing large-scale graphs is challenging due to the nature of the computation that
causes irregular memory access patterns. Managing such irregular accesses may cause …
causes irregular memory access patterns. Managing such irregular accesses may cause …
DRT: a lightweight runtime for developing benchmarks for a dataflow execution model
Future computers may take advantage of a dataflow program execution model (PXM) for
both performance and energy advantages. One key element to provide a compilation tool …
both performance and energy advantages. One key element to provide a compilation tool …
Reconfigurable Architectures for Accelerating Distributed Applications," A Graph Processing Application Case Study"
A Sahebi - 2022 - flore.unifi.it
This thesis mainly focuses on state-of-the-art challenges of distributed execution models and
research on the system support for artificial intelligence and high performance computing …
research on the system support for artificial intelligence and high performance computing …
A data-flow execution engine for scalable embedded computing
M Procaccini, R Giorgi - Acaces Poster Abstract 2017, 2017 - usiena-air.unisi.it
Nowadays embedded systems are increasingly used in the world of distributed computing to
provide more computational power without having to change the whole system and the …
provide more computational power without having to change the whole system and the …
A Data-Flow Threads Co-processor for MPSoC FPGA Clusters
F KHALILI MAYBODI - 2021 - flore.unifi.it
Farnam Khalili Maybodi's PhD thesis Page 1 PHD PROGRAM IN SMART COMPUTING
DIPARTIMENTO DI INGEGNERIA DELL’INFORMAZIONE (DINFO) A Data-Flow Threads Co-processor …
DIPARTIMENTO DI INGEGNERIA DELL’INFORMAZIONE (DINFO) A Data-Flow Threads Co-processor …