Force-directed algorithms have been developed over the last 50 years and used in many
application fields, including information visualisation, biological network visualisation …

Design for low power has become a key requirement in today's SoC design, especially for
mobile applications. Multi-Vdd is an effective method to reduce both leakage and dynamic …

Incremental physical design is an important methodology towards achieving design closure
for high-performance large-scale circuits. Placement tools must accommodate incremental …

Due to increasing design complexity, routing congestion has become a critical problem in
VLSI designs. This paper introduces a distributed metric to predict routing congestion for a …

Advanced technologies are expected to reduce interconnect delays and increase transistor
packing densities to allow for the continuation of Moore's Law. These advancements are …

However, two-level logic circuits are of limited importance in very large-scale integrated
(VLSI) design; most designs use multiple levels of logic. An early system that was used to …

In this paper, we present a new timing-driven placement algorithm, which attempts to
minimize zigzags and crisscrosses on the timing-critical paths of a circuit. We observed that …

The impact of physical synthesis on design performance is increasing as process
technology scales. Current physical synthesis flows generally perform a series of individual …

Due to skewed scaling of interconnect versus cell delay in deep submicron CMOS, modern
VLSI timing closure requires extensive buffer insertion. Inserting a large number of buffers …

Design for low power has become a key requirement in today's System-on-a-Chip design,
particularly for mobile applications. Multi-Vdd (MSV) is an effective method to reduce both …