Design and optimization of phase frequency detector through Taguchi and ANOVA statistical techniques for fast settling low power frequency synthesizer
In this work, a novel phase frequency detector (PFD) architecture using pass transistor logic
is proposed. The circuit does not have a reset path, resulting in the elimination of blind zone …
is proposed. The circuit does not have a reset path, resulting in the elimination of blind zone …
Optimization of Performance Parameters of Phase Frequency Detector Using Taguchi DoE and Pareto ANOVA Techniques
This paper utilizes Taguchi design of experiments and Pareto analysis of variance statistical
approaches to demonstrate circuit optimization. The phase-frequency detector (PFD) circuit …
approaches to demonstrate circuit optimization. The phase-frequency detector (PFD) circuit …
A high speed phase detection circuit with no dead zone suitable for minimal jitter and low power applications
A novel phase frequency detector design is introduced in this study, which removes dead
and blind zone issues by eliminating reset path, therefore accelerating the acquisition …
and blind zone issues by eliminating reset path, therefore accelerating the acquisition …
A Low Current Mismatch High Swing Charge Pump for High Speed Phase Locked Loop
C Zhang, Q Wang - 2021 IEEE 3rd International Conference on …, 2021 - ieeexplore.ieee.org
Based on 28nm CMOS process, a low current loss and high swing charge pump suitable for
high speed PLL circuit is designed and verified under 1.05 V voltage supply. by adopting a …
high speed PLL circuit is designed and verified under 1.05 V voltage supply. by adopting a …
A Low Spur 5.9-GHz CMOS Frequency Synthesizer with Loop Sampling Filter for C-V2X Applications
E Ulusoy, E Zencir - Journal of Circuits, Systems and Computers, 2023 - World Scientific
In this paper, a very low spur 5.9-GHz integer-N frequency synthesizer designed for a
Cellular Vehicle-to-Everything (C-V2X) receiver is presented. The PLL is referenced to a 10 …
Cellular Vehicle-to-Everything (C-V2X) receiver is presented. The PLL is referenced to a 10 …
Low power, wide range synthesizer for 534 MHz–18.56 GHz band with FoM of− 192.45 dBc/Hz
A wide range frequency synthesizer is designed with the help of dual voltage tunable
Differential Ring Oscillator (DRO). Frequency ranging from 534 MHz to 18.56 GHz can be …
Differential Ring Oscillator (DRO). Frequency ranging from 534 MHz to 18.56 GHz can be …
Inverter Design and Droop Parallel Control Strategy Based on Virtual Impedance
L Wang - Journal of Sensors, 2022 - Wiley Online Library
The present work is aimed at improving the performance of the multiobjective energy
parallel step‐by‐step power generation system and enhancing the reliability and stability of …
parallel step‐by‐step power generation system and enhancing the reliability and stability of …