A 16 nm finfet circuit with triple function as digital multiplexer, active-high and active-low output decoder for high-performance sram architecture

B Jeevan, K Sivani - Semiconductor Science and Technology, 2022 - iopscience.iop.org
This paper presents a fin field-effect transistor (FinFET)-based single circuit (FSC) used to
realize an active-high output decoder (AHD), active-low output decoder (ALD) and digital …

Design of efficient 22 nm, 20-FinFET full adder for low-power and high-speed arithmetic units

J Battini, S Kosaraju - Silicon, 2023 - Springer
The design of a 20-FinFET novel full adder (NFA) with a new architecture employing Double
Gate-FinFETs is presented in this work. The feature of new topology is, the input carry of full …

Simulation and synthesis of UART through FPGA Zedboard for IoT applications

B Jeevan, P Sahithi, P Samskruthi… - … on Advances in …, 2022 - ieeexplore.ieee.org
Communication between any two electronic devices requires set of rules. These set of rules
are called protocols. They ensure that data communication is done without any corruption …

An efficient single-stage carry select adder using excess-1 FinFET circuit in 22 nm technology

J Battini, S Kosaraju - Semiconductor Science and Technology, 2024 - iopscience.iop.org
Conventional carry select adders (CCSA) have two stages and are followed by multiplexers.
CCSAs use ripple carry adders at two stages, which will introduce much delay due to carry …

Design and UVM based Verification of UART, SPI, and I2C Protocols

N Sahay, S Gajjar - 2024 5th International Conference on …, 2024 - ieeexplore.ieee.org
There are several hardware communication protocols available today, but the three most
prevalent and frequently used are UART (Universal Asynchronous Receiver Transmitter) …

A new 18nm FinFET-based Programmable Logic Array type Multiplexer for High-speed and Low-Power applications

B Jeevan, K Sivani - 2023 IEEE 20th India Council …, 2023 - ieeexplore.ieee.org
The speed and power of a circuit are the primary attributes one looks for in a design. To
accompany a fast technologically driven world where usage of electronic devices is rapidly …

Transmission Gate based Keeper Control for Domino Logic Circuits

A Rout, S Dn, A Angeline, Sasipriya - Proceedings of the 2022 …, 2022 - dl.acm.org
Design of domino logic circuits at lower technology nodes, require a keeper circuit to
facilitate replenishing of dynamic node against charge leakage and charge sharing …