MM Maryan, A Ghanaatian, SJ Azhari… - Arabian Journal for …, 2018 - Springer
In this paper, a CMOS ultra-low-power, high-speed four-quadrant current multiplier/divider circuit is presented. Based on square-difference approach, the proposed circuit is using a …
An ultra-low power (ULP) class-AB four-quadrant current multiplier is introduced with a new power and area-saving technique based on asymmetrical structures such as direct current …
M Danesh, A Jayaraj… - … on Circuits and …, 2019 - ieeexplore.ieee.org
In this paper, a wide dynamic range, current-mode four-quadrant analog multiplier circuit is proposed that utilizes MOS translinear principle. The proposed multiplier is designed in …
In this paper, an analog multiplier, the transistors of which operate in weak inversion area is presented. The proposed multiplier have the features of transistors unification that brings …
A wide range, Current mode four quadrant Analog Multiplier based on Tranlinear Loops is proposed in this work. The proposed multiplier is designed in 65nm technology using CMOS …
N Abirami - International Journal of Research Science and …, 2016 - ijrsm.com
A design of multiplier/divider circuit using a single Current Differencing Buffered Amplifier (CDBA) is presented. Here the objective is to simultaneously realize a multiplier and a …