The growing global demand for services offered by data centers (DCs) has increased their
total power consumption and carbon emissions. Recent figures revealed that DCs account …

This paper studies TSV-to-TSV coupling in 3D ICs. A full-chip SI analysis flow is proposed
based on the proposed coupling model. Analysis results show that TSVs cause significant …

The nano-scale 3-D interconnects available in monolithic 3-D integrated circuit (IC)
technology enable ultrahigh density device integration at the individual transistor level. In …

Through-silicon-via (TSV)-to-TSV coupling is a new phenomenon in 3-D ICs, and it becomes
a significant source of signal integrity problems. The existing studies on its extraction and …

TSV-to-TSV coupling is a new parasitic element in 3D ICs and can become a significant
source of signal integrity problem. Existing studies on its extraction, however, becomes …

TSV redundancy and reconfiguration in 3D-ICs is a well-known method for overcoming TSV
manufacturing faults. However, additional post-manufacturing faults can manifest over the …

Physical Design for 3D Integrated Circuits reveals how to effectively and optimally design 3D
integrated circuits (ICs). It also analyzes the design tools for 3D circuits while exploiting the …

Through-silicon vias (TSVs) have two negative effects in the design of three-dimensional
integrated circuits (3-D ICs). First, TSV insertion leads to silicon area overhead. In addition …

One of the most effective ways to deal with the area and capacitance overhead issues with
through-silicon vias (TSVs) in 3D ICs is to reduce the size of TSVs themselves. Today, the …

In this paper, we perform an exploration of 3D NoC architectures through physical design
implementation based on two tiers Tezzaron 3D technology. The 3D NoC partitioning is …