Compiler-directed selection of dynamic memory layouts

M Kandemir, I Kadayif - … of the ninth international symposium on …, 2001 - dl.acm.org
Compiler technology is becoming a key component in the design of embedded systems,
mostly due to increasing participation of software in the design process. Meeting system …

High-performance phase measuring profilometry architecture based on Zynq SoC

F Fan, J Kang, L Feng, Z Zhang, L Yuan, B Wu - Applied Optics, 2023 - opg.optica.org
This paper presents a novel high-performance heterogeneous computation architecture, to
the best of our knowledge, for stereo structure light using the phase measuring profilometry …

Adaptive memory architecture for real-time image warping

A Motten, L Claesen, Y Pan - 2012 IEEE 30th International …, 2012 - ieeexplore.ieee.org
This paper presents a real time image warping module implemented in hardware. A look-up
table (LUT) based reverse mapping is used to relate the source image to the warped image …

An ultra-high-speed hardware accelerator for image reconstruction and stereo rectification on event-based camera

Y Zhang, T He, L Peng, Y Chang, K Huang… - Microelectronics …, 2022 - Elsevier
Event-based cameras are novel bio-inspired vision sensors, which sense brightness
changes rather than the actual intensity level. In contrast to conventional cameras, such …

Leveraging polynomial approximation for non-linear image transformations in real time

M Pohl, M Schaeferling, G Kiefer, P Petrow… - Computers & Electrical …, 2014 - Elsevier
Applying non-linear image transformations in real time remains a challenge for cost-
sensitive embedded systems today. This paper offers a method to perform such …

An efficient and scalable architecture for real-time distortion removal and rectification of live camera images

M Pohl, M Schaeferling, G Kiefer… - 2012 International …, 2012 - ieeexplore.ieee.org
Non-linear image distortions are a serious problem for computer vision and industrial real-
time image processing systems. This paper describes and analyzes an efficient architecture …

A real-time hardware architecture for image rectification using floating point processing

D Han, J Choi, HC Shin - Journal of the Institute of Electronics and …, 2014 - koreascience.kr
This paper suggests a novel hardware architecture of a real-time rectification which is to
remove vertical parallax of an image occurred in the pre-processing stage of stereo …

Low complexity image rectification for multi-view video coding

M Choi, J Kim, WK Cho, Y Chung - 2012 IEEE International …, 2012 - ieeexplore.ieee.org
Image rectification is one of the most complex pre-processing techniques for multi-view
video coding (MVC). It corrects image distortion and simplifies MVC matching operations by …

Line buffer reduction for LUT-based real-time image inverse warping

Y Lu, X Luo, Y Wang, L Claesen - 2016 14th IEEE International …, 2016 - ieeexplore.ieee.org
Inverse warping is widely adopted to rectify the image with non-linear distortion, which is
caused by the perspective feature of optical lenes. This scheme stores warping coordinate …

Real-time hardware implementation of stereo image rectification with calibrated cameras

H Wang, Y Li, L Claesen - 2018 IEEE International Conference …, 2018 - ieeexplore.ieee.org
Nowadays stereo matching has been proved as a useful technique for acquiring depth
information from stereo images. To reduce the computation cost of the matching process …