A unified hardware/software monitoring method for reconfigurable computing architectures using PAPI

L Suriano, D Madroñal, A Rodríguez… - … -centric Systems-on …, 2018 - ieeexplore.ieee.org
In this work, a standard and unified method for monitoring hardware accelerators in
Reconfigurable Computing Architectures is proposed, based on a standard software …

A Model-Driven Platform for Dynamic Partially Reconfigurable Architectures: A Case Study of a Watermarking System

R Dalbouchi, C Trabelsi, M Elhajji, A Zitouni - Micromachines, 2023 - mdpi.com
The reconfigurable feature of FPGAs (Field-Programmable Gate Arrays) has made them a
very attractive solution for implementing adaptive systems-on-chip. However, this implies …

Soft-core embedded FPGA based system on chip

H Saidi, M Turki, Z Marrakchi, M Abid… - Analog Integrated Circuits …, 2021 - Springer
Nowadays, there has been an intensive increase in embedded systems complexity. So that
optimization and performance development become an interesting topic to study. In this …

Exploration of word width and cluster size effects on tree-based embedded fpga using an automation framework

H Saidi, M Turki, Z Marrakchi, HB Ahmed… - Journal of Circuits …, 2021 - World Scientific
This paper introduces a novel framework that automates and accelerates the development
of embedded Field Programmable Gate Arrays (eFPGAs). The proposed solution is …

New cad tools to configure tree-based embedded fpga

H Saidi, M Turki, Z Marrakchi… - … Conference on High …, 2019 - ieeexplore.ieee.org
An embedded FPGA (e-FPGA) is an IP which can be integrated in a System on Chip
architecture to add more flexibility and reconfigurability to the design. This e-FPGA needs to …

Transformable electronics implantation in ROM for anti-reverse engineering

S Chen, L Wang - International Journal of High Speed Electronics …, 2019 - World Scientific
The protection of intellectual property (IP) is increasingly critical for IP vendors in the
semiconductor industry. Read Only Memories (ROMs) serve as important non-volatile …

Enabling OpenMP task parallelism on Multi-FPGAs= Habilitando o paralelismo de tarefas do OpenMP em Multi-FPGAs

RS Nepomuceno - 2021 - repositorio.unicamp.br
Os aceleradores de hardware baseados em FPGA têm recebido uma crescente atenção
nos últimos anos. Um dos principais motivos para isso é que seus recursos reconfiguráveis …

[PDF][PDF] Design-Space Exploration of Application-specific Instruction-set Processor Design

MH SARGOLZAEI - 2021 - ezyaccess.in
ABSTRACT Application-Specific Instruction-Set Processors (ASIPs) have established their
processing power in the embedded systems. Since energy efficiency is one of the most …

Aceleradores Reconfiguráveis no Projeto Multicore: uma análise de custo versus benefício

ASB Lopes, MM Pereira - HOLOS, 2020 - ifrn.edu.br
A crescente evolução do software através de novas técnicas tem permitido o
desenvolvimento de diversas soluções para atender a demanda da sociedade. Um …