276-Pin buffered memory module with enhanced fault tolerance

DM Dreps, FD Ferriaolo, KC Gower… - US Patent …, 2007 - Google Patents
806 having a length of about 151.2 to about 151.5 millimeters, a plurality of individual local
memory devices attached to the card, and a buffer device attached to the card, the buffer …

System, method and storage medium for providing segment level sparing

TJ Dell, FD Ferraiolo, KC Gower, KW Kark… - US Patent …, 2009 - Google Patents
US PATENT DOCUMENTS 6,219,760 B1 4/2001 McMinn 6,233,639 B1 5/2001 Dell et al.
4,641,263. A 2f1987 Perlman et al. 6,260,127 B1 7/2001 Olarig et al................. 711/167 …

High density high reliability memory module with power gating and a fault tolerant address and command bus

BG Hazelzet - US Patent 7,870,459, 2011 - Google Patents
(57) ABSTRACT A high density high reliability memory module with power gating and a fault
tolerant address and command bus. The memory module includes a rectangular printed …

Systems and methods for memory module power management

MA Brittain, WE Maule, K Rajamani, EE Retter… - US Patent …, 2009 - Google Patents
Abstract Systems and methods for determining memory module power requirements in a
memory system. Embodiments include a memory system with a physical memory and a …

Systems and methods for providing performance monitoring in a memory system

KC Gower, CE Love, DJ VanStee - US Patent 7,493,439, 2009 - Google Patents
Systems and methods for providing performance monitoring in a memory system.
Embodiments include a memory system for storing and retrieving data for a processing …

Systems and methods for providing distributed technology independent memory controllers

KC Gower, WE Maule, RB Tremaine - US Patent 7,594,055, 2009 - Google Patents
Abstract Systems and methods for providing distributed technology independent memory
controllers. Systems include a computer memory system for storing and retrieving data. The …

System, method and storage medium for providing a high speed test interface to a memory subsystem

TM Cowell, KC Gower, F Lapietra - US Patent 7,475,316, 2009 - Google Patents
(51) Int. Cl de f ing parallel bus input d ived via th GOIR 3L/28(2006.01) parallel bus port into
serial packetized output data for output GIC 29/00(2006.01) via the serial bus port. The serial …

System, method and storage medium for providing a high speed test interface to a memory subsystem

TM Cowell, KC Gower, F Lapietra - US Patent 7,395,476, 2008 - Google Patents
(57) ABSTRACT A buffer device for testing a memory subsystem. The buffer device includes
a parallel bus port adapted for connection to a slow speed bus and a serial bus port adapted …

System, method and storage medium for providing a serialized memory interface with a bus repeater

KC Gower, KW Kark, MW Kellogg, WE Maule - US Patent 7,296,129, 2007 - Google Patents
A packetized cascade memory system including a plurality of memory assemblies, a
memory bus including multiple segments, a bus repeater module and a segment level …

Systems and methods for providing memory modules with multiple hub devices

PW Coteus, WE Maule, EJ Seminaro… - US Patent …, 2009 - Google Patents
Abstract Systems and methods for providing memory modules with multiple hub devices.
Exemplary systems include a cascade-interconnect memory system with a memory bus, a …