Memory channel contention is a critical performance bottleneck in modern systems that have
highly parallelized processing units operating on large data sets. The memory channel is …

A color data transferring circuit, a color data storing circuit, and a block selecting circuit 1020
are provided separately from an input/output buffer circuit, in order to transmit data stored in …

A semiconductor memory device and a method of operation in the semiconductor memory
device. The memory device receives an external clock signal and includes an array of …

A semiconductor memory device which includes a set of interface terminals to receive a
plurality of control signals which specify that the memory device receive a first set of data bits …

A memory device having a plurality of memory cells, the memory device comprising clock
receiver circuitry to receive an external clock signal, and input receiver circuitry to sample, in …

(63) Continuation of application No. 09/213,243,? led on Dec.(List continued on neXt Page)
17, 1998, now Pat. No. 6,101,152, which is a continuation of application No. 09/196,199 …

A method of controlling a synchronous memory device comprising issuing a write request to
the memory device, wherein in response to the write request, the memory device samples …

Related US Application Data (63) Continuation of application No. 09/893,836, filed on Jun.
28, 2001, which is a continuation of application No. 09/629, 497, filed on Jul. 31, 2000, now …

The present invention includes a memory subsystem comprising at least two semiconductor
devices, including at least one memory device, connected to a bus, where the bus includes …

A synchronous memory device and methods of operation and controlling such a device. The
method of controlling the memory device includes providing a value which is representative …