Maintaining correctness is of paramount importance in the design of a computer system.
Within a multiprocessor interconnection network, correctness is guaranteed by having …

Nowadays, static power consumption in chip multiprocessor (CMP) is the most crucial
concern of chip designers. Power-gating is an effective approach to mitigate static power …

Since static power gradually dominates on-chip network power, power gating has been
widely studied as a way to mitigate this trend. Even though many power gating methods …

We revisit the question of how many virtual networks (VNs) are required to provably avoid
deadlock in a cache coherence protocol. The textbook way of reasoning about VNs says that …

Abstract Networks-on-Chip (NoCs) are becoming the communication backbone in multicore
chips. The router buffer holds a critical significance for the communication performance of …

A Network-on-Chip (NoC) is an essential component of a chip multiprocessor (CMP) which
however contributes to a large fraction of system energy. The unpredictability of traffic across …

Networks-on-chip (NoCs) are scaled out to build large-scale multi-chip networks to meet the
growing demand for computing. However, the traditional router-based NoC architecture has …

As the number of cores in a multicore system increases, the communication pressure on the
interconnection network also increases. The network-on-chip (NoC) architecture is expected …

Contemporary flow control mechanisms, especially virtual channels, are employed by
modern on-chip networks to allow better utilization of the link bandwidth through buffering …

Virtual channel (VC) flow control is the de facto choice for modern networks-on-chip (NoCs)
to allow better utilization of the link bandwidth through buffering and packet switching (PS) …