Low voltage analog circuit design techniques: A tutorial

S Yan, E Sanchez-Sinencio - IEICE Transactions on Fundamentals …, 2000 - search.ieice.org
Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In
particular,(i) technology considerations;(ii) transistor model capable to provide performance …

A 10-bit 200-MS/s CMOS parallel pipeline A/D converter

L Sumanen, M Waltari… - IEEE Journal of Solid …, 2001 - ieeexplore.ieee.org
This paper describes a 10-bit 200-MS/s CMOS parallel pipeline analog-to-digital (A/D)
converter that can sample input frequencies above 200 MHz. The converter utilizes a front …

[图书][B] The Circuits and Filters Handbook (Five Volume Slipcase Set)

WK Chen - 2018 - taylorfrancis.com
Standard-setting, groundbreaking, authoritative, comprehensive—these often overused
words perfectly describe The Circuits and Filters Handbook, Third Edition. This standard …

[图书][B] Analog CMOS filters for very high frequencies

B Nauta - 2012 - books.google.com
Integrated circuit technology is widely used for the full integration of electronic systems. In
general, these systems are realized using digital techniques implemented in CMOS …

A compact switched-capacitor regulated charge pump power supply

BR Gregoire - IEEE journal of solid-state circuits, 2006 - ieeexplore.ieee.org
A CMOS switched-capacitor reference is combined with a switched-capacitor voltage
doubling charge pump to produce a compact regulated 3.2-V power supply from an input …

CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

A Rodríguez-Vázquez… - IEEE Transactions on …, 1993 - ieeexplore.ieee.org
This paper presents design considerations for monolithic implementation of piecewise-linear
(PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS …

A low-phase-noise 0.004-ppm/step DCXO with guaranteed monotonicity in the 90-nm CMOS process

J Lin - IEEE journal of solid-state circuits, 2005 - ieeexplore.ieee.org
This paper presents an integrated 26-MHz digitally controlled crystal oscillator (DCXO) for
GSM standard that achieves a phase noise of-140 dBc/Hz at 1 kHz and-152 dBc/Hz at 10 …

Design Optimization of High-Speed and Low-Power Operational Transconductance Amplifier Using gm/ID Lookup Table Methodology

T Konishi, K Inazu, JG Lee, M Natsui… - IEICE transactions on …, 2011 - search.ieice.org
We propose a design optimization flow for a high-speed and low-power operational
transconductance amplifier (OTA) using agm/ID lookup table design methodology in scaled …

Low-voltage CMOS transconductance cell based on parallel operation of triode and saturation transconductors

AL Coban, PE Allen - Electronics Letters, 1994 - IET
A new linearity improvement technique for CMOS triode transconductors is presented. The
idea is based on the parallel operation of CMOS triode and saturation region …

A 1-V, 16.9 ppm/C, 250 nA Switched-Capacitor CMOS Voltage Reference

CY Hsieh, HW Huang, KH Chen - IEEE transactions on very …, 2010 - ieeexplore.ieee.org
An ultra low-power, precise voltage reference using a switched-capacitor technique in 0.35-
μm CMOS is presented in this paper. The temperature dependence of the carrier mobility …