Energy-efficient nonvolatile reconfigurable logic using spin hall effect-based lookup tables

R Zand, A Roohi, D Fan… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
In this paper, we leverage magnetic tunnel junction (MTJ) devices to design an energy-
efficient nonvolatile lookup table (LUT), which utilizes a spin Hall effect (SHE) assisted …

Fundamentals, modeling, and application of magnetic tunnel junctions

R Zand, A Roohi, RF DeMara - Nanoscale Devices, 2018 - taylorfrancis.com
Aggressive Metal Oxide Semiconductor (MOS) technology scaling in digital circuits has
resulted in important challenges including a significant increase in leakage currents, short …

MRAM-enhanced low power reconfigurable fabric with multi-level variation tolerance

R Zand, RF DeMara - … Transactions on Circuits and Systems I …, 2019 - ieeexplore.ieee.org
A hybrid device technology reconfigurable logic fabric is proposed which leverages the
cooperating advantages of distinct magnetic random access memory (MRAM)-based look …

Fault tolerant and energy efficient signal processing on FPGA using evolutionary techniques

D Jose, R Tamilselvan - … and Computational Models: Proceedings of ICC3 …, 2016 - Springer
In this paper, an energy efficient approach using field-programmable gate array (FPGA)
partial dynamic reconfiguration (PDR) is presented to realize autonomous fault recovery in …

Evolvable hardware in FPGAs: Embedded tutorial

R Salvador - 2016 International Conference on Design and …, 2016 - ieeexplore.ieee.org
The roots of adaptive and bio-inspired computing systems date back to the early days of
computers. Evolvable Hardware is one of the various approaches that emerged in the last …

[HTML][HTML] Fault self-repair strategy based on evolvable hardware and reparation balance technology

J Zhang, J Cai, Y Meng, T Meng - Chinese Journal of Aeronautics, 2014 - Elsevier
In the face of harsh natural environment applications such as earth-orbiting and deep space
satellites, underwater sea vehicles, strong electromagnetic interference and temperature …

Implementation of genetic algorithm framework for fault tolerant system on chip

D Jose, PN Kumar, JA Shirley… - International …, 2014 - search.proquest.com
In this article, a hardware/software platform using field programmable gate array (FPGA)
reconfigurability and genetic algorithm (GA) is presented, to realize autonomous fault …

[图书][B] Handbook of research on natural computing for optimization problems

JK Mandal - 2016 - books.google.com
Nature-inspired computation is an interdisciplinary topic area that connects the natural
sciences to computer science. Since natural computing is utilized in a variety of disciplines, it …

Leveraging Signal Transfer Characteristics and Parasitics of Spintronic Circuits for Area and Energy-Optimized Hybrid Digital and Analog Arithmetic

A Tatulian - 2023 - stars.library.ucf.edu
Abstract While Internet of Things (IoT) sensors offer numerous benefits in diverse
applications, they are limited by stringent constraints in energy, processing area and …

Embedded STT-MRAM Energy Analysis for Intermittent Applications using Mean Standby Duration

M Hossain, S Salehi, D Mulvaney… - 2021 28th IEEE …, 2021 - ieeexplore.ieee.org
Power, area, and delay trade-offs occupy a vital role in early pre-fabrication design
decisions for various System-on-Chip (SoC) and intermittently powered devices. The …