Our community has improved the efficiency of deep learning applications by exploiting
sparsity in inputs. Most of that work, though, is for inference, where weight sparsity is known …

High performance microprocessors require high levels of instruction supply. Branch
prediction has been the most important driver of this for nearly 30 years. Unfortunately …

To enhance the performance of memory-bound applications, hardware designs have been
developed to hide memory latency, such as the out-of-order (OoO) execution engine, at the …

Out-of-order processors heavily rely on speculation to achieve high performance, allowing
instructions to bypass other slower instructions in order to fully utilize the processor's …

Increasing demands for energy efficiency constrain emerging hardware. These new
hardware trends challenge the established assumptions in code generation and force us to …

My advisor, Prof. Yale Patt has been instrumental in the completion of my Ph. D. program.
Thank you for inspiring my interest in computer architecture, for convincing me to pursue my …

Load-Dependent Branches (LDB) often do not exhibit regular patterns in their local or global
history and thus are inherently hard to predict correctly by conventional branch predictors …

In the context of compilers, branch probability prediction deals with estimating the probability
of a branch to be taken in a program. In the absence of profiling information, compilers rely …

谓词执行是有效挖掘控制流程序指令级并行性的一种机制. 经典的谓词实现一般局部地逐个进行
谓词计算而不能进行多谓词控制, 有谓词计算路径过长等问题. 针对经典谓词存在的问题 …

The state-of-the-art branch predictor, TAGE, remains inefficient at identifying correlated
branches deep in a noisy global branch history. This dissertation argues this inefficiency is a …