Networks-on-Chips have been suggested as a powerful solution to communication problems in multi/many-core architectures. The communications mapping consists of one of …
Determining feasible application mappings for Design Space Exploration (DSE) and run- time embedding is a challenge for modern many-core systems. The underlying NP-complete …
V Richthammer, T Scheinert, M Glaß - … 2020, Samos, Greece, July 5–9 …, 2020 - Springer
With increasingly complex applications and architectures, the task of determining Pareto- optimal implementations at the system level becomes a challenge even for state-of-the-art …
C Benchehida, MK Benhaoua… - … on Embedded & …, 2020 - ieeexplore.ieee.org
In this paper, we address the problem of analyzing the behavior of a set of real-time tasks on a Network-on-chip-based (NoC) architecture. Our approach is to transform the allocation of …
MK Benhaoua, AK Singh - International Journal of High …, 2015 - inderscienceonline.com
Multi-processor system-on-chip (MPSoC) has emerged as a solution to address the increased computational requirements of modern applications. The network-on-chip (NoC) …
X Zhou, Z Zhu - Microelectronics Journal, 2017 - Elsevier
The task mapping has a significant impact on the system performance of Network-on-Chip (NoC). In this paper, we propose a dynamic task mapping algorithm for Software-Defined …
MK Benhaoua, AK Singh, AEH Benyamina… - Journal of Digital …, 2015 - dline.info
To fulfill the need of intensive embedded computations, architects have proposed Network- on-Chip based Multi-Processor Systems-on-Chip. Applications exploit the distinct features of …
Summary Three‐dimensional Network‐on‐Chip (3D NoC) is a promising solution for solving 2D NoC problems while optimizing the system's performance. Mapping applications in 3D …
The increasing complexity of modern Cyber-Physical Systems (CPS) requires the usage of powerful embedded computing systems to satisfy their timing constraints. Typically, the …