The benefits of technology scaling have fueled interest in voltage-time domain hybrid ADCs.
The hybrid ADCs employing combinations of successive approximation register (SAR), time …

The scaling of CMOS technology deep into the nanometer range has created challenges for
the design of highperformance analog ICs: they remain large in area and power …

An energy efficient, low-power 10-bit asynchronous successive approximation register
(SAR) analog-to-digital (ADC) converter with the sampling frequency of 8 MS/s is presented …

Wireless neural-recording instruments eliminate the bulky cables in multi-channel signal
transmission, while the system size should be reduced to mitigate the impact on freely …

This paper provide a comparative study of design techniques for bootstrapping in the
sample-and-hold of energy-efficient successive approximation register analog-to-digital …

This paper provides a comparative study of bootstrapping techniques in energy-efficient
successive approximation register analog-to-digital converters (SAR ADCs). The need for …

This brief proposes a novel comparator to greatly increase its comparison speed while not
degrading its noise performance. This comparator is well suited for high-speed high …

This paper proposes a new circuit-based approach to mitigate nonlinearity in open-loop ring-
oscillator-based analog-to-digital converters (ADCs). The approach consists of driving a …

Partial discharge is a well-established metric for condition assessment of high-voltage plant
equipment. Traditional techniques for partial discharge detection involve physical …

A fixed-window level-crossing analog-to-digital converter (LC-ADC) with only one
continuous-time comparator is proposed for the biomedical electronics. Compared with the …