[图书][B] Processor description languages

P Mishra, N Dutt - 2011 - books.google.com
Efficient design of embedded processors plays a critical role in embedded systems design.
Processor description languages and their associated specification, exploration and rapid …

Understanding the GPU microarchitecture to achieve bare-metal performance tuning

X Zhang, G Tan, S Xue, J Li, K Zhou… - Proceedings of the 22nd …, 2017 - dl.acm.org
In this paper, we present a methodology to understand GPU microarchitectural features and
improve performance for compute-intensive kernels. The methodology relies on a reverse …

ISAMAP: instruction mapping driven by dynamic binary translation

M Souza, D Nicácio, G Araújo - International Symposium on Computer …, 2010 - Springer
Abstract Dynamic Binary Translation (DBT) techniques have been largely used in the
migration of legacy code and in the transparent execution of programs across different …

[PDF][PDF] Reconfigurable architectures for embedded systems

H Svensson - 2008 - cdworkshop.eit.lth.se
Application-specific circuits are used to migrate computer systems from workstations to
handheld devices that need real-time performance within the budget for physical size and …

Describing and Simulating Dynamic Reconfiguration in SystemC Exemplified by a Dedicated 3D Collision Detection Hardware

A Raabe - 2008 - bonndoc.ulb.uni-bonn.de
The ongoing trend towards development of parallel software and the increased flexibility of
state-of-the-art programmable logic devices are currently converging in the field of …

A flexible platform framework for rapid transactional memory systems prototyping and evaluation

F Kronbauer, A Baldassin, B Albertini… - 18th IEEE/IFIP …, 2007 - ieeexplore.ieee.org
Transactional memory (TM) is an emerging synchronization mechanism that aims to solve
most of the difficulties inherent in lock-based approaches. TM implementations may either …

Automatic link editor generation for embedded CPU cores

DC Casarotto, LCV Dos Santos - 2006 IEEE North-East …, 2006 - ieeexplore.ieee.org
SoC design space exploration requires code generation for several CPU core alternatives.
However, an embedded software code generation toolkit cannot be developed from scratch …

Design and Implementation of Binary Utilities Generator

JQ Shen, J Wu, ZF Zhang, HQ Ren - Applied Mechanics and …, 2014 - Trans Tech Publ
This paper presents a framework for generating assembler and disassembler from ADL
(architecture description language), which enables processor architecture designers to …

[PDF][PDF] Implementace obecného assembleru

A Husár, INGT HRUŠKA - 2007 - theses.cz
This thesis describes the design of the universal assembler that represents a part of the
Lissom project. You will be provided with the description of the assembler architectures and …

[PDF][PDF] Uma abordagem em ArchC para caracterização e desenvolvimento de processadores em nível de arquitetura

MG Silva - repositorio.unicamp.br
A dissertação apresenta acSynth, um conjunto de ferramentas integradas que tem por
objetivo fornecer uma plataforma aberta de desenvolvimento e síntese de projetos a partir …