A Two-stage Dynamic Comparator with Low Delay and Low Offset

X Liu, Q Lei, R Chen, Y Yang - 2023 3rd International …, 2023 - ieeexplore.ieee.org
Low delay and low offset comparators are crucial in many fields such as science, medicine,
and engineering that require high-precision measurement and data collection, as they do …

45nm CMOS Two-Stage Latched Comparator

R Der Yeghiayan, E Salameh… - … on Smart Systems …, 2022 - ieeexplore.ieee.org
We present a 45nm CMOS high-speed latched comparator suitable for several applications
including high-speed data conversion. The comparator is designed and implemented at the …

[PDF][PDF] A 10-Bit, 180 MS/s, 1.65 mW Differential Asynchronous SAR ADC in 90nm CMOS

N Poole - nikhilpoole.wordpress.com
This work presents a 180 MS/s, 1.65 mW, 10-bit fully differential asynchronous SAR ADC
exhibiting impressive linearity up to Nyquist and designed using 90 nm CMOS technology …